Patents
Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002)
05/1996
05/22/1996EP0712515A1 Variable latency cut-through bridging
05/22/1996EP0712512A1 On-line barcode printer with automatic communication parameter determining system
05/22/1996CN1122979A Methods and systems for interprocess communication and inter-network data transfer
05/22/1996CN1122927A Virtual array type access device of direct memory
05/21/1996US5519883 Interbus interface module
05/21/1996US5519882 System for configuring a disk drive as a master or slave by either cable or local selection with only one jumper block or one switching device
05/21/1996US5519880 Parallel processing system and data transfer method which reduces bus contention by use of data relays having plurality of buffers
05/21/1996US5519879 Integrated circuit having CPU and DSP for executing vector lattice propagation instruction and updating values of vector Z in a single instruction cycle
05/21/1996US5519874 Application execution control method and system for servicing subscribers via a switchboard connected to a computer using an application management table
05/21/1996US5519872 Fast address latch with automatic address incrementing
05/21/1996US5519854 Write request interlock
05/21/1996US5519853 Method and apparatus for enhancing synchronous I/O in a computer system with a non-volatile memory and using an acceleration device driver in a computer operating system
05/21/1996US5519851 Portable PCMCIA interface for a host computer
05/21/1996US5519839 Double buffering operations between the memory bus and the expansion bus of a computer system
05/21/1996US5519838 Fast pipelined distributed arbitration scheme
05/21/1996US5519837 Pseudo-round-robin arbitration for a shared resource system providing fairness and high throughput
05/21/1996US5519707 Multiplexing of communications services on a virtual service path in an ATM network or the like
05/21/1996US5519695 Switch element for fiber channel networks
05/21/1996US5519693 High speed transmission line interface
05/21/1996US5519641 Method and apparatus for configuring plural multimedia audio cards as a local area network
05/21/1996US5519603 Intelligent process control communication system and method having capability to time align corresponding data sets
05/21/1996US5519584 Laminated cylindrical backplane
05/21/1996US5519527 Modem for communicating with enclosed electronic equipment
05/17/1996WO1996014689A1 Pcmcia autoconfigure pc card
05/17/1996WO1996014620A1 Priority line switching system
05/17/1996WO1996014619A1 Hierarchical crossbar switch
05/17/1996WO1996014618A1 A method and apparatus for controlling non-computer system devices by manipulating a graphical representation
05/17/1996WO1996014614A1 Single computer control system for a wide range of electronic devices
05/17/1996CA2204113A1 A method and apparatus for controlling non-computer system devices by manipulating a graphical representation
05/15/1996EP0712099A1 A business system including at least one transaction terminal
05/15/1996EP0712084A1 Emulation of direct memory access
05/15/1996EP0712082A1 Method and apparatus for adaptive circular predictive buffer management
05/15/1996EP0494907B1 A method of controlling access to restricted access data and communication system therefor
05/15/1996CN1122540A Simultaneous voice/data answering machine
05/15/1996CN1122475A Testing and measuring method for high-speed data transmission machine
05/15/1996CN1122472A Interface circuit for CD-ROM drive
05/14/1996US5517671 System for designating a plurality of I/O devices to a plurality of I/O channels and connecting and buffering the plurality of I/O channels to a single system bus
05/14/1996US5517670 Adaptive data transfer channel employing extended data block capability
05/14/1996US5517669 Cyclic data communication system
05/14/1996US5517661 Single-chip micro-computer having a plurality of operation modes
05/14/1996US5517660 Read-write buffer for gathering write requests and resolving read conflicts based on a generated byte mask code
05/14/1996US5517650 Bridge for a power managed computer system with multiple buses and system arbitration
05/14/1996US5517648 Symmetric multiprocessing system with unified environment and distributed system functions
05/14/1996US5517647 Communication control system and information processing system
05/14/1996US5517646 For use with a computer system
05/14/1996US5517627 Read and write data aligner and method
05/14/1996US5517626 Open high speed bus for microcomputer system
05/14/1996US5517625 System bus control system for multiprocessor system
05/14/1996US5517624 Multiplexed communication protocol between central and distributed peripherals in multiprocessor computer systems
05/14/1996US5517623 Flexible entry level or advanced level computer system
05/14/1996US5517619 Interconnection network and crossbar switch for the same
05/14/1996US5517615 Multi-channel integrity checking data transfer system for controlling different size data block transfers with on-the-fly checkout of each word and data block transferred
05/14/1996US5517532 Standing sine wave clock bus for clock distribution systems
05/14/1996US5517505 Synchronization method and apparatus for a wireless packet network
05/14/1996US5517500 Packet handling method
05/14/1996US5517488 Method of load distribution for message processing in host system in local area network
05/14/1996US5517325 Direct memory access (DMA) controller with programmable bus release period for timing DMA transfers
05/14/1996CA2051177C Bus master with antilockup and no idle bus cycles
05/14/1996CA2050129C Dynamic bus arbitration with grant sharing each cycle
05/09/1996WO1996013802A1 A peripheral card having independent functionality and method used therewith
05/09/1996WO1996013778A1 Hierarchical serial bus assembly
05/09/1996WO1996013777A1 Method and apparatus for dynamically generating and maintaining frame based polling schedules for polling isochronous and asynchronous functions that guarantee latencies and bandwidths to the isochronous functions
05/09/1996WO1996013776A1 M & a for exchanging data, status, and commands over a hierarchical serial bus assembly using communication packets
05/09/1996WO1996013775A1 Simultaneous processing by multiple components
05/09/1996WO1996013774A1 Multiprocessor system bus protocol for optimized accessing of interleaved storage modules
05/09/1996WO1996013771A1 Method and apparatus for serially interfacing isochronous and asynchronous peripherals
05/09/1996WO1996013769A1 M & a for dynamically determining and managing connection topology of a hierarchical serial bus assembly
05/09/1996WO1996010224A3 Mechanism for linking together the files of emulated and host system for access by emulated system users
05/09/1996CA2203378A1 Simultaneous processing by multiple components
05/09/1996CA2154296A1 Method and apparatus for configuring fabrics within a fibre channel system
05/08/1996EP0711053A1 Switch element for fibre channel networks
05/08/1996EP0710914A1 Smart programming of flash memory
05/08/1996EP0710913A1 Peripheral component interconnect bus system having latency and shadow timers
05/08/1996EP0710912A1 Automatic detection of network hardware connection
05/08/1996EP0710911A1 Arbitration device
05/08/1996EP0710906A1 Reducing bus contention in shared memory
05/08/1996EP0710431A1 Space-saving memory module
05/08/1996EP0710376A1 Method for configuring multiple adapter cards on a bus
05/08/1996EP0710374A1 Apparatus for adding modem capabilities to a computer system equipped with a digital signal processor
05/08/1996CN1122078A Signal transmitting device, circuit block and integrated circuit suited to fast signal transmission
05/08/1996CN1122020A Infrared data transfer from selective calling receiver to information processing device
05/07/1996US5515537 Real-time distributed data base locking manager
05/07/1996US5515523 Method and apparatus for arbitrating conflicts by monitoring number of access requests per unit of time in multiport memory systems
05/07/1996US5515521 Circuit and method for reducing delays associated with contention interference between code fetches and operand accesses of a microprocessor
05/07/1996US5515516 Initialization mechanism for symmetric arbitration agents
05/07/1996US5515515 Live data storage array system having individually removable, and self-configuring data storage units
05/07/1996US5515514 Peripheral processor card for upgrading a computer
05/07/1996US5515510 Communications internetwork system connecting a client node array to a resource array
05/07/1996US5515492 User interface between a server and workstations of a transactional processing system
05/07/1996US5515423 Two-line telephone controller
05/07/1996US5515373 Telecommunications interface for unified handling of varied analog-derived and digital data streams
05/07/1996US5515368 Information transmission system with variable transmission rate
05/07/1996US5515268 Method of and system for ordering products
05/07/1996US5515098 System and method for selectively distributing commercial messages over a communications network
05/07/1996US5515051 Wireless signaling system
05/07/1996CA2051209C Consistency protocols for shared memory multiprocessors
05/02/1996WO1996013112A1 A method for internal communication in a telecommunications system
05/02/1996WO1996013106A1 System and method for remote wake-up
05/02/1996WO1996013002A1 Method and apparatus for controlling network and workstation access prior to workstation boot
05/02/1996WO1995024729A3 Modular architecture for high bandwidth computers