| Patents for G06F 13 - Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units (158,002) |
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| 07/09/1996 | US5535419 Sytem and method for merging disk change data from a floppy disk controller with data relating to an IDE drive controller |
| 07/09/1996 | US5535418 Information processing system with selection of input/output processing control according to precalculated input/output processing time |
| 07/09/1996 | US5535417 On-chip DMA controller with host computer interface employing boot sequencing and address generation schemes |
| 07/09/1996 | US5535416 Method for allowing application program in computer system to access device directly in exclusive mode by bypassing operating system and blocking requests from other programs |
| 07/09/1996 | US5535415 Method for automatically setting the internal and external port configuration of a computer system |
| 07/09/1996 | US5535414 Secondary data transfer mechanism between coprocessor and memory in multi-processor computer system |
| 07/09/1996 | US5535403 Method and apparatus for displaying clusters on a computer network |
| 07/09/1996 | US5535400 Computer system |
| 07/09/1996 | US5535396 Modulator data/control equipment |
| 07/09/1996 | US5535395 Prioritization of microprocessors in multiprocessor computer systems |
| 07/09/1996 | US5535380 System to reduce latency for real time interrupts |
| 07/09/1996 | US5535371 Portable computer with automatic adaption to different device types on a standard port |
| 07/09/1996 | US5535366 Method of and circuit arrangement for freeing communications resources, particularly for use by a switching element |
| 07/09/1996 | US5535363 Computer system |
| 07/09/1996 | US5535362 Data transfer control apparatus wherein a time value is compared to a clocked timer value with a comparison of the values causing the transfer of bus use right |
| 07/09/1996 | US5535352 Computing system |
| 07/09/1996 | US5535343 Method and apparatus for generating write signals |
| 07/09/1996 | US5535341 Apparatus and method for determining the status of data buffers in a bridge between two buses during a flush operation |
| 07/09/1996 | US5535340 Method and apparatus for maintaining transaction ordering and supporting deferred replies in a bus bridge |
| 07/09/1996 | US5535339 Dual processor controlled compact disk-interactive system |
| 07/09/1996 | US5535338 Multifunction network station with network addresses for functional units |
| 07/09/1996 | US5535336 Apparatus and method for enabling a network interface to dynamically assign an address to a connected computer and to establish a virtual circuit with another network interface |
| 07/09/1996 | US5535333 Adapter for interleaving second data with first data already transferred between first device and second device without having to arbitrate for ownership of communications channel |
| 07/09/1996 | US5535332 Shared-data alteration status management apparatus |
| 07/09/1996 | US5535331 Data processing device |
| 07/09/1996 | US5535326 System and method for logical console verification and feedback |
| 07/09/1996 | US5535242 Method and system for modem command processing during data transfer |
| 07/09/1996 | US5535204 Ringdown and ringback signalling for a computer-based multifunction personal communications system |
| 07/09/1996 | US5535199 TCP/IP header compression X.25 networks |
| 07/09/1996 | US5535147 Method and apparatus for downloading information from a controllable light source to a portable information device |
| 07/09/1996 | US5534811 Voltage clamping circuit |
| 07/09/1996 | US5534801 Auto-sensing circuit |
| 07/09/1996 | CA2112749C A composition of matter for coating a press roll |
| 07/09/1996 | CA2096730C Electronic wallet |
| 07/09/1996 | CA2048081C Method for controlling microprocessors |
| 07/04/1996 | WO1996020549A1 Fault monitoring |
| 07/04/1996 | WO1996020548A1 Fault monitoring |
| 07/04/1996 | WO1996020461A1 Method for implementing a private key communication protocol between two processing devices |
| 07/04/1996 | WO1996020446A1 Main memory system with multiple data paths |
| 07/04/1996 | WO1996020445A1 Method for start-up and binding of a computer to a network |
| 07/04/1996 | CA2208983A1 Method for implementing a private key communication protocol between two processing devices |
| 07/03/1996 | EP0720412A2 Telelcommunication kiosk network architecture |
| 07/03/1996 | EP0720336A2 Script preprocessing system and method |
| 07/03/1996 | EP0720333A2 Message filtering techniques |
| 07/03/1996 | EP0720100A1 Device for emulating a communication line |
| 07/03/1996 | EP0720099A1 Method and apparatus for implementing a bus protocol having in-order termination |
| 07/03/1996 | EP0720091A2 Multi-level token management for distributed file systems |
| 07/03/1996 | EP0719485A1 Access control for portable data storage media |
| 07/03/1996 | EP0719432A1 Method and apparatus for configuring systems |
| 07/03/1996 | CN1125882A A method of automatically recognizing a language in which digital data are received |
| 07/03/1996 | CN1125869A Transfer interface unit for data |
| 07/03/1996 | CN1125868A Computer system and method of issuing input/output commands therefrom |
| 07/03/1996 | CN1125867A Client-server type network |
| 07/03/1996 | CN1125866A Method and apparatus for transmission of signals over a shared line |
| 07/02/1996 | US5533205 Method and system for efficient bus allocation in a multimedia computer system |
| 07/02/1996 | US5533204 Split transaction protocol for the peripheral component interconnect bus |
| 07/02/1996 | US5533203 Start of packet receive interrupt for ethernet controller |
| 07/02/1996 | US5533202 Apparatus using a binary coded decimal switch and a programmable logic array for selectively coupling terminals of a controller chip to data bus lines |
| 07/02/1996 | US5533201 Method and apparatus for simultaneous interconnection of multiple requestors to multiple memories |
| 07/02/1996 | US5533200 Method and apparatus for transmission of signals over a shared line |
| 07/02/1996 | US5533026 Communication system including method and apparatus for maintaining communications with a mobile terminal |
| 07/02/1996 | US5533020 ATM cell scheduler |
| 07/02/1996 | US5532939 Method and apparatus for data communication efficiency analysis |
| 07/02/1996 | US5532836 Apparatus for gradually switching video presentation of stored pictures |
| 07/02/1996 | US5532682 Control data transmission system |
| 07/02/1996 | CA2009548C Single physical main storage shared by two or more processors executing respective operating systems |
| 06/27/1996 | WO1996019772A1 Variable data processor allocation and memory sharing |
| 06/27/1996 | WO1996019769A1 Method and mechanism for maintaining integrity within scsi bus with hot insertion |
| 06/27/1996 | DE4445802A1 Connector for hard disk storage system |
| 06/27/1996 | DE4445801A1 Dynamic RAM memory drive circuit |
| 06/26/1996 | EP0719060A2 Control system for telecommunication installations |
| 06/26/1996 | EP0718931A2 Laminated cylindrical backplane |
| 06/26/1996 | EP0718842A1 Apparatus and method for data storage devices and communications systems with multiple parallel signal processing paths |
| 06/26/1996 | EP0718784A1 Personalized information retrieval |
| 06/26/1996 | EP0718779A1 Single-chip microcomputer |
| 06/26/1996 | EP0718778A1 Method of transmission of data on a bus |
| 06/26/1996 | EP0718777A2 Electronic apparatus having connecting means |
| 06/26/1996 | EP0718776A2 Electronic apparatus having connection means |
| 06/26/1996 | EP0718775A1 Reading from and writing to a m-byte memory utilizing a processor having a n-byte data bus |
| 06/26/1996 | EP0718774A1 Multimedia system employing timers to properly allocate bus access |
| 06/26/1996 | EP0718773A1 Bus access arbiter |
| 06/26/1996 | EP0718772A1 Method to improve bus latency and to allow burst transfers of unknown length |
| 06/26/1996 | EP0718771A1 DMA logic unit architecture |
| 06/26/1996 | EP0718770A1 Method and apparatus for communicating between master and slave electronic devices where the slave device may be hazardous |
| 06/26/1996 | EP0718768A1 Single-chip microcomputer |
| 06/26/1996 | EP0718763A1 System and method of debugging in a data processor |
| 06/26/1996 | EP0718761A1 A platform independent object and object viewer loader and method |
| 06/26/1996 | CN1125491A Video peripheral for a computer |
| 06/26/1996 | CN1125370A Method and apparatus for matching functional unit in series muster and slave device |
| 06/25/1996 | US5530965 Multiply connectable microprocessor and microprocessor system |
| 06/25/1996 | US5530962 Memory control device for an assay apparatus |
| 06/25/1996 | US5530955 Page memory device capable of short cycle access of different pages by a plurality of data processors |
| 06/25/1996 | US5530944 Intelligent programmable dram interface timing controller |
| 06/25/1996 | US5530941 System and method for prefetching data from a main computer memory into a cache memory |
| 06/25/1996 | US5530906 Control circuit responses to a wait request from an address decoder for controlling clock signal supply to a CPU to operate with slow peripheral |
| 06/25/1996 | US5530905 Temporary state preservation for a distributed file service which purges virtual circuit control information after expiration of time limit of inactivity |
| 06/25/1996 | US5530904 System for tranferring data from one communication line to another using a multiplexer for selecting the lines and transferring data without intervention of a main processor |
| 06/25/1996 | US5530903 System for reassigning a higher priority to an interrupted user by inhibiting the access of other users until the interrupted user has completed its task |
| 06/25/1996 | US5530902 Data packet switching system having DMA controller, service arbiter, buffer type managers, and buffer managers for managing data transfer to provide less processor intervention |
| 06/25/1996 | US5530901 Data Transmission processing system having DMA channels running cyclically to execute data transmission from host to memory and from memory to processing unit successively |