| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 07/21/1993 | EP0552078A1 Insertable card for microcomputer constituting a reader for cards with flat contacts |
| 07/21/1993 | EP0552077A1 Mass memory card for microcomputer with facilities for execution of internal programs |
| 07/21/1993 | EP0551718A2 System and method for ensuring write data integrity in a redundant array data storage system |
| 07/21/1993 | EP0551696A1 Hypertext display system |
| 07/21/1993 | EP0551528A1 Method and apparatus for reducing lock period of shared buffer |
| 07/21/1993 | EP0551387A1 Apparatus and methods for distributed address decoding and memory configuration |
| 07/20/1993 | US5230072 System for managing hierarchical information in a digital data processing system |
| 07/20/1993 | US5230070 Access authorization table for multi-processor caches |
| 07/20/1993 | US5230069 Apparatus and method for providing private and shared access to host address and data spaces by guest programs in a virtual machine computer system |
| 07/20/1993 | US5230047 Method for balancing of distributed tree file structures in parallel computing systems to enable recovery after a failure |
| 07/20/1993 | US5230045 Multiple address space system including address translator for receiving virtual addresses from bus and providing real addresses on the bus |
| 07/20/1993 | CA1320591C Dynamic memory management system and method |
| 07/14/1993 | EP0551148A2 Direct input/output in a virtual memory system |
| 07/14/1993 | CN1021604C Apparatus and method for recovering from missing page faults in vector data processing operation |
| 07/13/1993 | US5228136 Method and apparatus to maintain cache coherency in a multiprocessor system with each processor's private cache updating or invalidating its contents based upon set activity |
| 07/13/1993 | US5228135 Multiport cache memory control unit including a tag memory having plural address ports and a snoop address part |
| 07/13/1993 | US5228134 Cache memory integrated circuit for use with a synchronous central processor bus and an asynchronous memory bus |
| 07/13/1993 | CA1320285C2 High availability cache memory |
| 07/13/1993 | CA1320284C Multi-processor system with cache memories |
| 07/13/1993 | CA1320280C Temporary state preservation for a distributed file service |
| 07/08/1993 | WO1993013481A1 Interleaved cache for multiple accesses per clock in a microprocessor |
| 07/08/1993 | WO1993013475A1 Method for performing disk array operations using a nonuniform stripe size mapping scheme |
| 07/08/1993 | WO1993010518A3 Video/graphics memory system |
| 07/08/1993 | CA2126754A1 Method for performing disk array operations using a nonuniform stripe size mapping scheme |
| 07/07/1993 | EP0550372A2 A data dictionary manager for maintaining an active data dictionary |
| 07/07/1993 | EP0550368A2 A method and system for a device interface to a database manager |
| 07/07/1993 | EP0550358A2 Fault tolerant multiprocessor cluster |
| 07/07/1993 | EP0550154A1 Method of updating records |
| 07/07/1993 | EP0549931A1 Guest/host large addressing method and means |
| 07/07/1993 | EP0549924A1 Asynchronous co-processor data mover method and means |
| 07/07/1993 | EP0549633A1 Improved memory system |
| 07/07/1993 | EP0339166B1 Extended errors correcting device having single package error correcting and double package error detecting codes |
| 07/06/1993 | US5226169 System for execution of storage-immediate and storage-storage instructions within cache buffer storage |
| 07/06/1993 | US5226168 Semiconductor memory configured to emulate floppy and hard disk magnetic storage based upon a determined storage capacity of the semiconductor memory |
| 07/06/1993 | US5226158 Method and apparatus for maintaining referential integrity within a relational database |
| 07/06/1993 | US5226157 Backup control method and system in data processing system using identifiers for controlling block data transfer |
| 07/06/1993 | US5226155 Method and system for allocating file space in memory of ic card |
| 07/06/1993 | US5226154 Data saving system having counters as block content update identifiers |
| 07/06/1993 | US5226147 Semiconductor memory device for simple cache system |
| 07/06/1993 | US5226146 Duplicate tag store purge queue |
| 07/06/1993 | US5226145 Storage management system for memory card using memory allocation table |
| 07/06/1993 | US5226144 Cache controller for maintaining cache coherency in a multiprocessor system including multiple data coherency procedures |
| 07/06/1993 | US5226143 Multiprocessor system includes operating system for notifying only those cache managers who are holders of shared locks on a designated page by global lock manager |
| 07/06/1993 | US5226141 Variable capacity cache memory |
| 07/06/1993 | US5226140 Apparatus for controlling the transfer of data |
| 07/06/1993 | US5226139 Semiconductor memory device with a built-in cache memory and operating method thereof |
| 07/06/1993 | US5226138 Method for selectively transferring data instructions to a cache memory |
| 07/06/1993 | US5226136 Memory cartridge bank selecting apparatus |
| 07/06/1993 | US5226134 Data processing system including a memory controller for direct or interleave memory accessing |
| 07/06/1993 | US5226133 Two-level translation look-aside buffer using partial addresses for enhanced speed |
| 07/06/1993 | US5226132 Multiple virtual addressing using/comparing translation pairs of addresses comprising a space address and an origin address (sto) while using space registers as storage devices for a data processing system |
| 07/06/1993 | US5226039 Packet routing switch |
| 07/06/1993 | US5226015 Semiconductor memory system |
| 07/06/1993 | US5226009 Semiconductor memory device supporting cache and method of driving the same |
| 07/06/1993 | CA1319998C Read-modify-write operation |
| 07/01/1993 | CA2084132A1 Data processing file format transparency system |
| 06/30/1993 | EP0549508A1 Reconfigurable multi-way associative cache memory |
| 06/30/1993 | EP0549325A2 Log archive filtering system for transaction-consistent forward recovery from catastrophic media failures |
| 06/30/1993 | EP0549321A2 Method and system for high-speed virtual-to-physical address translation and cache tag matching |
| 06/30/1993 | EP0549309A1 Address reduction scheme implementing rotation algorithm |
| 06/30/1993 | EP0549219A1 A cache controller |
| 06/30/1993 | EP0549218A1 A memory apparatus and method for use in a data processing system |
| 06/30/1993 | EP0549164A1 Memory controller with snooping mechanism |
| 06/30/1993 | EP0549140A2 Record updating method |
| 06/30/1993 | EP0549139A1 Programmable memory timing |
| 06/30/1993 | EP0548894A2 DRAM interface adapter circuit |
| 06/30/1993 | EP0548681A2 Recording and reproducing apparatus provided with a batch erasable nonvolatile semiconductor memory device for batch erasing of specific data group(s) |
| 06/30/1993 | EP0548315A1 Translation buffer for virtual machines with address space match |
| 06/30/1993 | EP0548153A1 Computer memory array control |
| 06/30/1993 | EP0548094A1 Active storage means in a reduction processor |
| 06/30/1993 | EP0548077A1 High speed active bus |
| 06/30/1993 | EP0548074A1 Distributed building of service request lists |
| 06/30/1993 | EP0452361A4 Arithmetic unit |
| 06/29/1993 | US5224217 Computer system which uses a least-recently-used algorithm for manipulating data tags when performing cache replacement |
| 06/29/1993 | US5224166 System for seamless processing of encrypted and non-encrypted data and instructions |
| 06/29/1993 | US5224160 Process for securing and for checking the integrity of the secured programs |
| 06/29/1993 | US5224103 Processing device and method of programming such a processing device |
| 06/29/1993 | US5224093 For use in a data packet switch |
| 06/29/1993 | CA1319756C Real-time database |
| 06/28/1993 | WO1993013478A1 Method for improving partial stripe write performance in disk array subsystems |
| 06/28/1993 | CA2126755A1 Method for improving partial stripe write performance on disk array subsystems |
| 06/24/1993 | WO1993012499A1 Open office directory database views |
| 06/24/1993 | WO1993012494A1 Interface of information selling terminal |
| 06/24/1993 | WO1993012493A1 Drive unit for reading information in information selling terminal |
| 06/24/1993 | WO1993012484A1 A cache memory hierarchy that reduces power consumption by reducing accesses to main memory |
| 06/24/1993 | WO1993012483A1 Semaphore bypass |
| 06/24/1993 | WO1993012480A1 Apparatus for reducing computer system power consumption |
| 06/24/1993 | WO1993008525A3 Data processing system |
| 06/24/1993 | CA2077057A1 Bridge between user interface and application development tool |
| 06/23/1993 | EP0547992A2 Method and system for enhanced efficiency of data recovery in balanced tree memory structures |
| 06/23/1993 | EP0547990A1 Method and system for group access control in a data processing system library |
| 06/23/1993 | EP0547903A2 Method and system for isolating data and information collection components from other components in a distributed environment |
| 06/23/1993 | EP0547862A2 Semiconductor memory unit used as external storage |
| 06/23/1993 | EP0547830A2 Circuitry and method for sequentially accessing a memory array |
| 06/23/1993 | EP0547769A1 Write overlap with overwrite prevention |
| 06/23/1993 | EP0547682A2 Memory testing system with algorithmic test data generation |
| 06/23/1993 | EP0547248A1 Risc microprocessor architecture with isolated architectural dependencies |
| 06/23/1993 | EP0547246A1 Microprocessor architecture capable of supporting multiple heterogeneous processors |
| 06/22/1993 | US5222231 Data processing system having a resume function and an operating method thereof |
| 06/22/1993 | US5222224 Scheme for insuring data consistency between a plurality of cache memories and the main memory in a multi-processor system |