Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
10/1993
10/27/1993EP0567421A1 Method and apparatus for increasing efficiency of ager
10/27/1993EP0567420A1 Multi-bit vector for page aging
10/27/1993EP0567355A2 A method and apparatus for operating a multiprocessor computer system having cache memories
10/27/1993EP0567243A1 Processor cache mask bits for post-demand memory access
10/27/1993EP0567238A2 System and method for ordering commands in an automatic volume placement library
10/27/1993EP0567237A1 Method and apparatus for increasing usable memory space
10/27/1993EP0566968A2 Method and system for concurrent access during backup copying of data
10/27/1993EP0566967A2 Method and system for time zero backup session security
10/27/1993EP0566966A2 Method and system for incremental backup copying of data
10/27/1993EP0566965A2 Method and system in a data processing system for administering multiple backup copy sessions
10/27/1993EP0566964A2 Method and system for sidefile status polling in a time zero backup copy process
10/27/1993EP0566895A2 File manager for files shared by heterogeneous clients
10/27/1993EP0566659A1 Memory control circuit for use with a copy back cache system
10/27/1993CN1077808A Multi-bit vector for page aging
10/27/1993CN1022591C Address processor for signal processor
10/26/1993US5257388 Device for detecting whether an attached external memory stores valid data, if not, whether the external memory is capable of storing data
10/26/1993US5257380 Initialization routine in an EEPROM
10/26/1993US5257371 System packaging object class defining information
10/26/1993US5257370 Method and system for optimizing data caching in a disk-based computer system
10/26/1993US5257367 Data storage system with asynchronous host operating system communication link
10/26/1993US5257366 Query language execution on heterogeneous database servers using a bind-file bridge between application and database languages
10/26/1993US5257361 Method and apparatus for controlling one or more hierarchical memories using a virtual storage scheme and physical to virtual address translation
10/26/1993US5257360 Re-configurable block length cache
10/26/1993US5257359 Instruction cache buffer with program-flow control
10/26/1993US5257353 I/O control system having a plurality of access enabling bits for controlling access to selective parts of an I/O device
10/26/1993US5257352 Input/output control method and system
10/26/1993US5257349 Interactive data visualization with smart object
10/26/1993US5257016 Apparatus for converting original character outline data including abridged special segment data, into normal character outline data
10/26/1993CA1323705C Storage locking control for a plurality of processors which share a common storage unit
10/26/1993CA1323701C Processing of memory access exceptions with pre-fetched instructions within the instruction pipeline of a virtual memory system-based digital computer
10/20/1993EP0566421A1 Dual addressing arrangement for a communications interface architecture
10/20/1993EP0566306A2 Semiconductor memory device
10/20/1993EP0566282A2 Method for accessing memory resident real-time data
10/20/1993EP0566243A1 Free memory cell management system
10/20/1993EP0536242A4 A number theory mapping generator for addressing matrix structures
10/20/1993EP0213577B1 Apparatus providing data backup upon power failure in a micro-computer controlled television receiver
10/19/1993US5255384 Memory address translation system having modifiable and non-modifiable translation mechanisms
10/19/1993US5255382 Program memory expander for 8051-based microcontrolled system
10/19/1993US5255381 Mode switching for a memory system with diagnostic scan
10/19/1993US5255378 Method of transferring burst data in a microprocessor
10/19/1993US5255377 Interface for arbitrating access to the paging unit of a computer processor
10/19/1993US5255366 Address processing unit for a graphics controller
10/19/1993US5255364 Electronic filing system wherein the automatic updating of retrieval data is voluntarily inhibited
10/19/1993US5255236 Ultraviolet radiation windows
10/19/1993US5255104 Method for displaying amount of documents
10/19/1993CA1323449C Method and apparatus for sharing memory in a multiprocessor system
10/19/1993CA1323448C Method and apparatus for translucent file system
10/19/1993CA1323446C Write-read/write-pass memory subsystem cycle
10/15/1993CA2093467A1 Method for accessing memory resident real-time data
10/14/1993WO1993020524A1 Fault tolerant change distribution method in a distributed database system
10/14/1993WO1993020515A1 Data addressable memory architecture and forming method
10/14/1993WO1993020514A1 Self-controlled write back cache memory apparatus
10/14/1993WO1993020512A1 Method and apparatus for storing and retrieving multi-dimensional data in computer memory
10/13/1993EP0565281A2 Information handling system incorporated with an information security measure
10/13/1993EP0564832A1 Identity verification system resistant to compromise by observation of its use
10/13/1993EP0564813A1 Bit line switch array for electronic computer memory
10/13/1993EP0564699A1 Disk drive with dual function buffer
10/12/1993US5253361 System for accessing a row of time-dependent data by referring to a composite index table indicating page locations of linked row labels
10/12/1993US5253358 Cache memory expansion and transparent interconnection
10/12/1993US5253357 System for determining pluggable memory characteristics employing a status register to provide information in response to a preset field of an address
10/12/1993US5253353 System and method for efficiently supporting access to I/O devices through large direct-mapped data caches
10/12/1993US5253352 Method and apparatus for pipelining cache accesses using anticipatory initiation of cache read
10/12/1993US5253351 Memory controller with a cache memory and control method of cache memory including steps of determining memory access threshold values
10/12/1993US5253350 Method of combining lower order and translated upper order bits to address ROM within a range reserved for other devices
10/12/1993US5253349 Decreasing processing time for type 1 dyadic instructions
10/12/1993US5253214 High-performance memory controller with application-programmable optimization
10/12/1993US5253203 Subarray architecture with partial address translation
10/12/1993US5253197 Semiconductor associative memory device with current sensing
10/12/1993CA2026236C Method and apparatus for current window cache
10/12/1993CA1323114C Self configuring memory system
10/12/1993CA1323112C Data processing system with memory-access priority control
10/12/1993CA1323110C Multi-processor system having a multi-port cache memory
10/06/1993EP0563924A1 Control device for controlling a central processing unit on instantaneous voltage drop
10/06/1993EP0563855A2 Picture storage apparatus and graphic engine apparatus
10/06/1993EP0563656A2 Semiconductor memory device
10/06/1993EP0563624A2 Method and apparatus for performing conditional operations on externally shared data
10/06/1993EP0563622A2 Sysplex shared data coherency method and means
10/06/1993EP0563621A2 Integrity of data objects used to maintain state information for shared data at a local complex
10/06/1993EP0563620A2 Method and apparatus for coupling data processing systems
10/06/1993EP0563282A1 Paging process using extension tables.
10/06/1993EP0563190A1 Interactive data visualization with smart object
10/05/1993US5251317 Computer system with an access control unit for resource
10/05/1993US5251316 Method and apparatus for integrating a dynamic lexicon into a full-text information retrieval system
10/05/1993US5251315 Atomic check-in check-out document copy commands partitioned into document interchange architecture system operands
10/05/1993US5251314 System for converting from one document type to a plurality of document types allowing accurate reversal therefrom using tables containing indications regarding non-transformable elements
10/05/1993US5251311 Method and apparatus for processing information and providing cache invalidation information
10/05/1993US5251310 Method and apparatus for exchanging blocks of information between a cache memory and a main memory
10/05/1993US5251309 System for measuring the efficiency of accessing vector elements using interelement distance of vector data or bank conflicts
10/05/1993US5251308 Shared memory multiprocessor with data hiding and post-store
10/05/1993US5251307 Channel apparatus with a function for converting virtual address to real address
10/05/1993US5251304 Integrated circuit microcontroller with on-chip memory and external bus interface and programmable mechanism for securing the contents of on-chip memory
10/05/1993US5251296 Methods and apparatus for generating arbitrarily addressed, arbitrarily shaped tiles in computer graphics systems
09/1993
09/30/1993WO1993019424A1 System and method for supporting a multiple width memory subsystem
09/30/1993WO1993019422A1 Fiber optic memory coupling system
09/30/1993DE4237417A1 Speicherprozessor, der eine aggressive Ausführung von Ladebefehlen erlaubt Storage processor, which allows an aggressive execution of load instructions
09/30/1993CA2132097A1 Fiber optic memory coupling system
09/29/1993EP0562669A1 Device comprising means for datavalidation in a memory
09/29/1993EP0562617A1 Object management system
09/28/1993US5249297 Methods and apparatus for carrying out transactions in a computer system
09/28/1993US5249291 Method and apparatus for consensual delegation of software command operations in a data processing system