Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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02/03/1994 | WO1994002894A2 Data-processing system with a device for handling program loops |
02/03/1994 | WO1994002872A1 Illumination system and method for a high definition light microscope |
02/03/1994 | CA2140654A1 Illumination system and method for a high definition light microscope |
02/02/1994 | EP0581639A1 Circuit for protecting integrated circuit against cuts in power supply |
02/02/1994 | EP0581425A1 Rapid data retrieval from data storage structures using prior access predictive annotations |
02/02/1994 | EP0581421A1 Method and system for certificate based alias detection |
02/02/1994 | EP0581362A1 System and method for preventing direct access data storage system data loss from mechanical shock during write operation |
02/02/1994 | EP0581253A2 Data retention circuit |
02/02/1994 | EP0581227A2 Apparatus for the recording and/or the reproducing of video signals |
02/02/1994 | EP0580943A1 Cache miss prediction method and apparatus for use with a paged main memory in a data processing system |
02/02/1994 | EP0580727A1 Coupling circuit, use thereof in a card, and method. |
02/02/1994 | EP0580660A1 Hypertext control method and apparatus for displaying help information in an interactive data processing system |
02/02/1994 | CN1081526A Information managing apparatus |
02/02/1994 | CN1081525A Rigid disk writing-proof interface device |
02/01/1994 | USH1291 Microprocessor in which multiple instructions are executed in one clock cycle by providing separate machine bus access to a register file for different types of instructions |
02/01/1994 | US5283897 Semi-dynamic load balancer for periodically reassigning new transactions of a transaction type from an overload processor to an under-utilized processor based on the predicted load thereof |
02/01/1994 | US5283890 Cache memory arrangement with write buffer pipeline providing for concurrent cache determinations |
02/01/1994 | US5283889 Hardware based interface for mode switching to access memory above one megabyte |
02/01/1994 | US5283886 Multiprocessor cache system having three states for generating invalidating signals upon write accesses |
02/01/1994 | US5283884 CKD channel with predictive track table |
02/01/1994 | US5283882 Data caching and address translation system with rapid turnover cycle |
02/01/1994 | US5283880 Method of fast buffer copying by utilizing a cache memory to accept a page of source buffer contents and then supplying these contents to a target buffer without causing unnecessary wait states |
02/01/1994 | US5283879 Protected method for fast writing of data for mass memory apparatus |
02/01/1994 | US5283877 Single in-line DRAM memory module including a memory controller and cross bar switches |
02/01/1994 | US5283876 Virtual memory unit utilizing set associative memory structure and state machine control sequencing with selective retry |
02/01/1994 | US5283875 Method and apparatus for optimizing prefetch caching by reverse ordering of logical blocks |
02/01/1994 | US5283868 Providing additional system characteristics to a data processing system through operations of an application program, transparently to the operating system |
02/01/1994 | US5283613 Monitoring system with dual memory for electrophotographic printing machines using replaceable cartridges |
02/01/1994 | CA2026741C Main storage memory cards having single bit set and reset functions |
02/01/1994 | CA2002362C Fault tolerant computer memory systems and components employing dual level error correction and detection with lock-up feature |
02/01/1994 | CA2000009C Increasing options in locating rom in computer memory space |
01/26/1994 | EP0580536A2 Method and apparatus for automatically building bibliographies in a multi-media environment |
01/26/1994 | EP0580338A1 External memory access control for a processing system |
01/26/1994 | EP0580116A2 Information managing apparatus |
01/26/1994 | EP0579633A1 Method of compiling, by computer, a programme consisting of several parts. |
01/25/1994 | US5282275 Address processor for a signal processor |
01/25/1994 | US5282274 Translation of multiple virtual pages upon a TLB miss |
01/25/1994 | US5282247 Apparatus and method for providing data security in a computer system having removable memory |
01/25/1994 | US5282201 Digital data communications apparatus |
01/25/1994 | US5282172 Look-ahead circuit for fast decode of bankselect signals in EMS systems |
01/25/1994 | CA1326566C Computer with intelligent memory system |
01/25/1994 | CA1326565C Object management facility for maintaining data in a computer system |
01/25/1994 | CA1326561C System for managing hierarchical information in a digital data processing system |
01/20/1994 | WO1994001856A1 Multiport game card with configurable address |
01/20/1994 | WO1994001815A1 Method and apparatus for a unified parallel processing architecture |
01/20/1994 | WO1993023811A3 Open architecture interface storage controller |
01/20/1994 | CA2138654A1 Multiport game card with configurable address |
01/19/1994 | EP0579418A2 Computer system maintaining data consistency between the cache and the main memory |
01/19/1994 | EP0579274A2 Non-volatile memory |
01/19/1994 | EP0579174A1 Storage region assignment method |
01/19/1994 | EP0345325B1 A memory system |
01/19/1994 | CN1081005A Adapter for constructing redundant disk storage system |
01/18/1994 | US5280614 Apparatus and method for controlling access to data using domains |
01/18/1994 | US5280612 Multiple version database concurrency control system |
01/18/1994 | US5280611 Method for managing database recovery from failure of a shared store in a system including a plurality of transaction-based systems of the write-ahead logging type |
01/18/1994 | US5280610 Methods and apparatus for implementing data bases to provide object-oriented invocation of applications |
01/18/1994 | US5280609 Methods of selecting document objects for documents stored in a folder format within an electronic information processing system |
01/18/1994 | US5280604 Multiprocessor system sharing expandable virtual memory and common operating system |
01/18/1994 | US5280599 Computer system with memory expansion function and expansion memory setting method |
01/18/1994 | US5280598 Cache memory and bus width control circuit for selectively coupling peripheral devices |
01/18/1994 | US5280572 Method and apparatus for storing text data in subcode packs |
01/18/1994 | US5280449 Data memory and method of reading a data memory |
01/12/1994 | EP0578433A2 Error and loss correction in a data base stored on a two dimensional medium and method |
01/12/1994 | EP0578406A1 Distributed transaction processing using two-phase commit protocol with presumed-commit without log force |
01/12/1994 | EP0578209A2 Method and system for organizing internal structure of a file |
01/12/1994 | EP0578207A2 Method and system for naming and binding objects |
01/12/1994 | EP0578205A2 Multiple file name referencing system |
01/12/1994 | EP0578204A2 Method and system for storing and on demand loading of objects |
01/12/1994 | EP0349582B1 Cellular addressing permutation bit map raster graphics architecture |
01/11/1994 | US5278982 Log archive filtering method for transaction-consistent forward recovery from catastrophic media failures |
01/11/1994 | US5278978 Method and system for describing and exchanging data between heterogeneous database systems with data converted by the receiving database system |
01/11/1994 | US5278968 Microprocessor capable of transferring data without intermediating execution unit |
01/11/1994 | US5278967 System for providing gapless data transfer from page-mode dynamic random access memories |
01/11/1994 | US5278966 Toroidal computer memory for serial and parallel processors |
01/11/1994 | US5278964 Microprocessor system including a cache controller which remaps cache address bits to confine page data to a particular block of cache |
01/11/1994 | US5278963 Pretranslation of virtual addresses prior to page crossing |
01/11/1994 | US5278962 System for logical address conversion data fetching from external storage and indication signal for indicating the information externally |
01/11/1994 | US5278961 Physical address to logical address translator for memory management units |
01/11/1994 | US5278847 Fault-tolerant memory system with graceful degradation |
01/11/1994 | US5278801 Flexible addressing for drams |
01/11/1994 | US5278800 Memory system and unique memory chip allowing island interlace |
01/11/1994 | US5278759 System and method for reprogramming vehicle computers |
01/06/1994 | WO1994000816A1 Remote dual copy of data in computer systems |
01/06/1994 | WO1993021581A3 Cryptographic data security in a secured computer system |
01/05/1994 | EP0577362A2 An expanded architecture for image storage and distribution |
01/05/1994 | EP0577102A2 Address formation circuit for image processing and method of generating address |
01/05/1994 | DE4305017A1 Data processor and peripherals on system bus - employs multibit code key read by processor in two access operations distinguished by variation of potentials on two lines |
01/05/1994 | DE4224080C1 Verfahren zur dynamischen Verwaltung eines freien Speichers einer Rechenanlage, des Freispeichers, für den eine Unterteilung in wenigstens zwei logische Speicherbereiche, die sich in ihren Zugriffseigenschaften unterscheiden, vorgesehen ist A method for dynamic management of a free space of a computer system, the heap that the subdivision is provided in at least two logical volumes, which differ in their access properties |
01/04/1994 | US5276901 System for controlling group access to objects using group access control folder and group identification as individual user |
01/04/1994 | US5276879 Portable, resource sharing file server using co-routines |
01/04/1994 | US5276878 Method and system for task memory management in a multi-tasking data processing system |
01/04/1994 | US5276876 Computer system for executing an application program |
01/04/1994 | US5276867 Digital data storage system with improved data migration |
01/04/1994 | US5276853 Cache system |
01/04/1994 | US5276852 Method and apparatus for controlling a processor bus used by multiple processor components during writeback cache transactions |
01/04/1994 | US5276851 Automatic writeback and storage limit in a high-performance frame buffer and cache memory system |
01/04/1994 | US5276850 Information processing apparatus with cache memory and a processor which generates a data block address and a plurality of data subblock addresses simultaneously |
01/04/1994 | US5276849 Apparatus and method for maintaining cache/main memory consistency utilizing a dual port FIFO buffer |
01/04/1994 | US5276848 Shared two level cache including apparatus for maintaining storage consistency |
01/04/1994 | US5276844 Protection system for critical memory information |