Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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05/17/1994 | US5313598 Method for changing non-leaf entry in tree structure of OSI directory information by sequentially issuing OSI directory commands for the non-leaf entry and lower entries associated therewith in response to decoded change command |
05/17/1994 | US5313587 Device for simultaneous data input/output and execution support in digital processors |
05/17/1994 | US5313582 Data communication controller |
05/17/1994 | US5313577 Translation of virtual addresses in a computer graphics system |
05/17/1994 | US5313520 Method and device for protecting data of ROM |
05/17/1994 | US5313475 Computer system |
05/17/1994 | US5313385 Utility program backup apparatus |
05/17/1994 | US5313299 Scan converter control circuit having memories and address generator for generating zigzag address signal supplied to the memories |
05/17/1994 | CA1329669C Organic polysiloxane liquid coating composition |
05/14/1994 | CA2102659A1 Solid state peripheral storage device |
05/11/1994 | WO1994010687A1 Verifiable security circuitry for preventing unauthorized access to programmed read only memory |
05/11/1994 | WO1994010655A1 Ic card |
05/11/1994 | WO1994010630A1 Data formatter |
05/11/1994 | WO1994002894A3 Data-processing system with a device for handling program loops |
05/11/1994 | EP0596659A2 Data analysis apparatus and methods |
05/11/1994 | EP0596636A2 Cache tag memory |
05/11/1994 | EP0596276A2 Secure memory card |
05/11/1994 | EP0596198A2 Flash eprom with erase verification and address scrambling architecture |
05/11/1994 | EP0596144A1 Hierarchical memory system for microcode and means for correcting errors in the microcode |
05/11/1994 | EP0595880A1 Memory management method |
05/11/1994 | DE4337740A1 Semiconductor memory for cache and image processing - has DRAM single line and column block selector circuits, SRAM cell block selector circuits, and circuit for transferring data between DRAM column block and selected cell block of SRAM |
05/11/1994 | DE4237772A1 Anordnung mit mehreren Funktionseinheiten Arrangement with several functional units |
05/11/1994 | CA2148464A1 Data formatter |
05/10/1994 | US5311591 Computer system security method and apparatus for creating and using program authorization information data structures |
05/10/1994 | US5311520 Method and apparatus for programmable memory control with error regulation and test functions |
05/10/1994 | US5311477 Integrated circuit memory device having flash clear |
05/10/1994 | US5311468 Random access memory with a serial register arranged for quick access of a second bit from an arbitrary address |
05/10/1994 | US5311458 CPU with integrated multiply/accumulate unit |
05/10/1994 | CA2103767A1 Cache architecture for high speed memory-to-i/o data transfers |
05/10/1994 | CA2009717C Multiprocessing system having a single translation lookaside buffer with reduced processor overhead |
05/10/1994 | CA1329432C Method of memory and cpu time allocation for a multi-user computer system |
05/04/1994 | EP0595554A1 Docking apparatus for portable computer |
05/04/1994 | EP0595288A1 Security circuit for protecting data stored in memory |
05/04/1994 | EP0595064A2 Method and means providing static dictionary structures for compressing character data and expanding compressed data |
05/04/1994 | EP0595036A1 DMA controller with memory testing capability |
05/04/1994 | EP0594969A1 Data processing system and method for calculating the sum of a base plus offset |
05/04/1994 | EP0325777B1 A distributed auditing subsystem for an operating system |
05/03/1994 | US5309451 Data and parity prefetching for redundant arrays of disk drives |
05/03/1994 | US5309156 Variable-length code decoding device |
05/03/1994 | CA2009779C Uncoupling a central processing unit from its associated hardware for interaction with data handling apparatus alien to the operating system controlling said unit and hardware |
04/28/1994 | WO1994009567A1 String search using the longest and closest match in a history buffer |
04/28/1994 | WO1994009436A1 Disk array controller having advanced internal bus protocol |
04/28/1994 | WO1994009434A1 Demand allocation of read/write buffer partitions favoring sequential read cache |
04/28/1994 | WO1994009433A2 A system for operating application software in a safety critical environment |
04/27/1994 | EP0594464A2 Method of operating a data storage disk array |
04/27/1994 | EP0594266A2 SRAM with flash clear for selectable I/Os |
04/27/1994 | EP0593968A1 Cache-based data compression/decompression |
04/27/1994 | EP0295424B1 Method for managing subpage concurrency control and partial transaction rollback in a transaction-oriented system of the write-ahead logging type |
04/26/1994 | US5307502 Data processing system having multiple register management for call and return operations |
04/26/1994 | US5307486 Method for updating an index tree structure of data based on node sizes |
04/26/1994 | US5307485 Method and apparatus for merging sorted lists in a multiprocessor shared memory system |
04/26/1994 | US5307484 Relational data base repository system for managing functional and physical data structures of nodes and links of multiple computer networks |
04/26/1994 | US5307478 Method for inserting a path instruction during compliation of computer programs for processors having multiple functional units |
04/26/1994 | US5307477 Two-level cache memory system |
04/26/1994 | US5307473 Controller for storage unit and method of controlling storage unit |
04/26/1994 | US5307471 Memory controller for sub-memory unit such as disk drives |
04/26/1994 | US5307470 Microcomputer having EEPROM provided with detector for detecting data write request issued before data write operation responsive to preceding data write request is completed |
04/26/1994 | US5307469 Multiple mode memory module |
04/26/1994 | US5307461 Multiple rank hierarchical data storage system with data coherence |
04/26/1994 | US5307445 Query optimization by type lattices in object-oriented logic programs and deductive databases |
04/26/1994 | US5307356 Interlocked on-chip ECC system |
04/26/1994 | US5307321 Semiconductor memory device with particular bank selector means |
04/26/1994 | US5307320 High integration DRAM controller |
04/26/1994 | CA2012402C Reference addressing method and system for a personal computer |
04/21/1994 | DE4335061A1 Multiple memory with identical units on common system bus - contains bus address control circuits for switching between master and back=up units on deflection of fault in master unit |
04/20/1994 | EP0593354A1 Query optimisation method for a relational database management system |
04/20/1994 | EP0593341A1 Query optimisation help method of a relational database management system and resulting syntactic analysis method |
04/20/1994 | EP0593305A2 Information carrier and recording and/or reproducing and/or initializing apparatus |
04/20/1994 | EP0593100A2 Multiprocessor digital data processing system |
04/20/1994 | EP0592914A2 Multimedia complex form creation, display and editing method apparatus |
04/20/1994 | EP0592638A1 Method and apparatus for organizing information in a computer system |
04/20/1994 | EP0533805A4 Method for efficient non-virtual main memory management |
04/19/1994 | US5305460 Data processor |
04/19/1994 | US5305458 Multiple virtual storage system and address control apparatus having a designation table holding device and translation buffer |
04/19/1994 | US5305448 Shared access serialization featuring second process lock steal and subsequent write access denial to first process |
04/19/1994 | US5305445 System and method employing extended memory capacity detection |
04/19/1994 | US5305444 Apparatus for increasing the number of hits in a translation lookaside buffer including instruction address lookaside register |
04/19/1994 | US5305434 System and method for executing panel actions from procedures |
04/19/1994 | US5305389 Data processing system |
04/19/1994 | US5305280 Semiconductor memory device having on the same chip a plurality of memory circuits among which data transfer is performed to each other and an operating method thereof |
04/19/1994 | US5305259 Power source voltage tracking circuit for stabilization of bit lines |
04/19/1994 | US5305139 Illumination system and method for a high definition 3-D light microscope |
04/14/1994 | WO1994008337A1 Target management method for data backup to a shared transfer station, multiple media element device |
04/14/1994 | WO1994008303A1 Method and apparatus for non-snoop window reduction |
04/14/1994 | WO1994008297A1 Method and apparatus for concurrency of bus operations |
04/14/1994 | WO1994008296A1 Double buffering operations between the memory bus and the expansion bus of a computer system |
04/14/1994 | WO1994008295A1 Method and apparatus for memory interleave reduction |
04/14/1994 | WO1994008289A1 Computer failure recovery and alert system |
04/14/1994 | WO1994008287A1 System and method for handling load and/or store operations in a superscalar microprocessor |
04/14/1994 | CA2146138A1 Double buffering operations between the memory bus and the expansion bus of a computer system |
04/14/1994 | CA2145885A1 Method and apparatus for non-snoop window reduction |
04/13/1994 | EP0592121A1 Method and system for maintaining translation lookaside buffer coherency in a multiprocessor data processing system |
04/13/1994 | EP0592098A2 Control method and apparatus for direct execution of a program on an external apparatus using a randomly accessible and rewritable memory |
04/13/1994 | EP0592074A1 System for processing a database relocation |
04/13/1994 | EP0592069A1 Electrically erasable, non-volatile semiconductor memory device for selective use in boot block type or normal type flash memory devices |
04/13/1994 | EP0591739A2 Working storage management in medical imaging systems |
04/13/1994 | EP0591437A1 Multiprocessor distributed initialization and self-test system. |
04/13/1994 | EP0591405A1 Multiprocessor array |
04/12/1994 | US5303378 Reentrant protected mode kernel using virtual 8086 mode interrupt service routines |
04/12/1994 | US5303377 Method for compiling computer instructions for increasing instruction cache efficiency |