Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
07/1992
07/01/1992EP0492072A1 Data transfer bus system and method serving multiple parallel asynchronous units
07/01/1992EP0492025A1 High-speed multi-port FIFO buffer circuit
07/01/1992EP0491697A1 Apparatus and method for maintaining cache/main memory consistency.
07/01/1992CN1062426A 归约处理器 Reduction Processor
06/1992
06/30/1992US5127096 Information processor operative both in direct mapping and in bank mapping, and the method of switching the mapping schemes
06/30/1992US5127095 Addressing system for a memory unit
06/30/1992US5127094 Virtual storage type computer system
06/30/1992US5126910 Modular computer memory circuit board
06/30/1992US5126889 Technique for information protection on fault-tolerant redundant information storage devices
06/30/1992CA1304523C Computer bus having page mode memory access
06/30/1992CA1304522C Memory address generation apparatus
06/30/1992CA1304521C Self-identifying scheme for memory
06/25/1992DE4041789A1 Dual plane sequence control for data processing system - has autonomous or unidirectional data communication between personal computers and main data processor
06/25/1992DE4041434A1 Process shifting method for processor working memory - rearranging storage locations for different processes to eliminate gaps and release storage capacity
06/24/1992EP0491585A2 Dynamic link libraries system and method
06/24/1992EP0491544A2 Error detection and correction memory system
06/24/1992EP0491517A2 Tree structure representation of an SQL clause
06/24/1992EP0491498A2 Apparatus and method for a space saving translation lookaside buffer for content addressable memory
06/24/1992EP0491480A2 Computer addressing apparatus
06/24/1992EP0270571B1 Arrangement for a portable data carrier having multiple application files
06/23/1992US5125086 Virtual memory paging apparatus with variable size in-page clusters
06/23/1992US5125085 Least recently used replacement level generating apparatus and method
06/23/1992US5125084 Control of pipelined operation in a microcomputer system employing dynamic bus sizing with 80386 processor and 82385 cache controller
06/23/1992US5125044 Image processing apparatus and method in which a plurality of access circuits can simultaneously perform access operations
06/23/1992US5124946 Semiconductor memory device associated with peripheral logic gates having a scan-path diagnostic mode of operation
06/23/1992US5124937 Data storing apparatus
06/23/1992CA1304167C Method and apparatus for managing multiple lock indicators in a multiprocessor computer system
06/23/1992CA1304166C Software emulation of bank-switched memory using a virtual dos monitorand paged memory management
06/23/1992CA1304164C Memory test method and apparatus
06/22/1992CA2058270A1 Method and apparatus for extending computer architecture from thirty-two to sixty-four bits
06/22/1992CA2057494A1 Translation lookaside buffer
06/17/1992EP0490526A2 Multi-system data sharing combination and method of operating same
06/17/1992EP0490525A2 Removal of data from a shared cache
06/17/1992EP0490485A2 Rotating memory system
06/17/1992EP0490465A2 Methods and apparatus for accessing non-relational data files using relational queries
06/17/1992EP0490239A2 Storage of compressed data on random access storage devices
06/16/1992US5123106 Multiprocessor system with shared memory includes primary processor which selectively accesses primary local memory and common memories without using arbiter
06/16/1992US5123104 Method and apparatus for concurrent modification of an index tree in a transaction processing system utilizing selective indication of structural modification operations
06/16/1992US5123101 Multiple address space mapping technique for shared memory wherein a processor operates a fault handling routine upon a translator miss
06/16/1992US5123099 Hot standby memory copy system
06/16/1992US5123098 Method for executing programs within expanded memory of a computer system using MS or PC DOS
06/16/1992US5123097 Apparatus and method for simultaneous execution of a write instruction and a succeeding read instruction in a data processing system with a store through cache strategy
06/16/1992US5123095 Integrated scalar and vector processors with vector addressing by the scalar processor
06/16/1992US5123045 Comprehensive software protection system
06/16/1992US5123016 Arrangement and method for identifying and localizing faulty circuits of a memory module
06/16/1992CA1303747C Method of rapidly opening disk files identified by path names
06/10/1992EP0489583A2 Multiple processor cache control system
06/10/1992EP0489556A2 Consistency protocols for shared memory multiprocessors
06/10/1992EP0141743B1 Pipeline error correction
06/10/1992CN1061865A Associative memory
06/10/1992CN1017007B Electronic computer system with expansion card
06/09/1992US5121494 Joining two database relations on a common field in a parallel relational database field
06/09/1992US5121490 Bit and word memory allocation for a programmable controller
06/09/1992US5121487 High speed bus with virtual memory data transfer capability using virtual address/data lines
06/09/1992US5121477 System for interactively creating action bar pull-down windows of a user interface for use at program run time
06/09/1992US5121354 Random access memory with access on bit boundaries
06/04/1992WO1992009961A1 Method and apparatus for engineering for a data model
06/04/1992CA2097604A1 Method and apparatus for engineering for a data model
06/03/1992EP0488819A2 Conditional branch instructions execution apparatus
06/03/1992EP0488771A2 Arbitration of packet switched busses, including busses for shared memory multiprocessors
06/03/1992EP0488770A2 Consistent packet switched memory bus for shared memory multiprocessors
06/03/1992EP0488567A2 Cache controller
06/03/1992EP0488566A2 Method and apparatus for fast page mode selection
06/03/1992EP0487910A1 Portable computer for varying read/write cycle according to type of memory card
06/03/1992EP0487819A2 Video random access memory with fast, alligned clear and copy
06/03/1992CN1016910B Self-testing memory
06/02/1992US5119493 System for recording at least one selected activity from a selected resource object within a distributed data processing system
06/02/1992US5119490 Concurrent processing controlling method and apparatus on B+ tree structure
06/02/1992US5119486 Memory board selection method and apparatus
06/02/1992US5119485 Method for data bus snooping in a data processing system by selective concurrent read and invalidate cache operation
06/02/1992US5119483 Application of state silos for recovery from memory management exceptions
06/02/1992US5119338 Memory device
06/02/1992US5119336 Memory write protection circuit
06/02/1992US5119290 Computer system
06/02/1992CA1302584C Parallel processing computer in which memory access priorities are varied
06/02/1992CA1302575C Fault detection circuit capable of detecting burst errors in an lru memory
06/02/1992CA1302573C Apparatus and method for recovering from missing page faults in vector data processing operations
06/02/1992CA1302540C Method and apparatus for nodes in network to avoid shrinkage of an interframe gap
05/1992
05/30/1992CA2056512A1 Method and apparatus for fast page mode selection
05/29/1992WO1992009035A1 Multilevel, hierarchical, dynamically mapped data storage subsystem
05/29/1992WO1992009025A2 Register forwarding multi-port register file
05/27/1992EP0487444A2 Method and apparatus for consensual delegation of software command operations in a data processing system
05/27/1992EP0487331A2 Directory management system
05/27/1992EP0487254A2 Memory addressing device
05/27/1992EP0486818A1 Control system
05/27/1992DE4037332A1 Monitoring data consistency in data processing system - using state identifiers associated wth each cache memory and evaluation of responses to address operations
05/27/1992CN1016830B Apparatus and method for main memory unit protection using access and fault logic signals
05/27/1992CN1016829B Method for controlling input and output access in virtual computer data handling system of multitasking virtual storage
05/26/1992US5117492 Memory addressing system using first and second address signals and modifying second address responsive predetermined values of first address signal
05/26/1992US5117491 Ring reduction logic using parallel determination of ring numbers in a plurality of functional units and forced ring numbers by instruction decoding
05/26/1992US5117428 System for memory data integrity
05/26/1992US5117350 Memory address mechanism in a distributed memory architecture
05/26/1992CA1301972C Video apparatus employing vrams
05/26/1992CA1301942C Memory cartridge
05/21/1992DE4136729A1 Cache control unit for fault tolerant computer system
05/21/1992DE3740890A1 Telephone exchange memory switching procedure - addressing vol. can be changed by reassignment of some rows to either preceding or following section
05/20/1992EP0486194A2 Memory system
05/20/1992EP0486154A2 Virtual memory system
05/20/1992EP0485759A2 Data loading device with cache memory
05/20/1992EP0485634A1 Information processing device having function of preventing program from being unjustly used