Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
09/1993
09/28/1993US5249288 Process for accommodating bad disk pages in an electronic printing system
09/28/1993US5249286 Selectively locking memory locations within a microprocessor's on-chip cache
09/28/1993US5249284 Method and system for maintaining data coherency between main and cache memories
09/28/1993US5249283 Cache coherency method and apparatus for a multiple path interconnection network
09/28/1993US5249282 Integrated cache memory system with primary and secondary cache memories
09/28/1993US5249281 Testable ram architecture in a microprocessor having embedded cache memory
09/28/1993US5249280 Microcomputer having a memory bank switching apparatus for accessing a selected memory bank in an external memory
09/28/1993US5249277 Optimized performance memory method and system
09/28/1993US5249276 Address translation apparatus having a memory access privilege check capability data which uses mask data to select bit positions of priviledge
09/28/1993US5249271 Buffer memory data flow controller
09/28/1993US5249268 Process for transmitting data between entities capable of emitting and/or receiving data
09/28/1993US5249232 Data processing system having an encryption device
09/28/1993US5249231 Memory tagging for object reuse protection
09/28/1993US5249212 Object reuse protection with error correction
09/28/1993US5249152 Bookkeeping memory
09/28/1993CA1322613C High speed read/modify/write memory system and method
09/28/1993CA1322611C Memory control unit
09/28/1993CA1322608C System bus having multi-plexed command/id and data
09/28/1993CA1322606C Fault recovery mechanism, transparent to digital system function
09/22/1993EP0561685A2 An electronic data protection system
09/22/1993EP0560938A1 Method and apparatus for engineering for a data model
09/22/1993CN1076534A Personal computer system with security features and method
09/22/1993CN1076533A Address extension of computer information processing system
09/21/1993US5247687 Method and apparatus for determining and using program paging characteristics to optimize system productive cpu time
09/21/1993US5247681 Dynamic link libraries system and method
09/21/1993US5247672 Transaction processing system and method with reduced locking
09/21/1993US5247670 Network server
09/21/1993US5247669 Persistent data interface for an object oriented programming system
09/21/1993US5247662 Join processor for a relational database, using multiple auxiliary processors
09/21/1993US5247653 Adaptive segment control and method for simulating a multi-segment cache
09/21/1993US5247649 Multi-processor system having a multi-port cache memory
09/21/1993US5247648 Maintaining data coherency between a central cache, an I/O cache and a memory
09/21/1993US5247647 Detection of deletion of stored data by concurrently executing processes in a multiprocessing data processing system
09/21/1993US5247645 Dynamic memory mapper which supports interleaving across 2N +1, 2.sup.NN -1 number of banks for reducing contention during nonunit stride accesses
09/21/1993US5247644 Processing system with improved sequential memory accessing
09/21/1993US5247643 Memory control circuit for optimizing copy back/line fill operation in a copy back cache system
09/21/1993US5247642 Apparatus for determining cacheability of a memory address to provide zero wait state operation in a computer system
09/21/1993US5247639 Microprocessor having cache bypass signal terminal
09/21/1993US5247638 Apparatus for compressing data in a dynamically mapped virtual data storage subsystem
09/21/1993US5247635 Vector processing system for invalidating scalar cache memory block indicated by address in tentative vector store instruction
09/21/1993US5247634 Method of managing memory allocation by association of memory blocks with a tree structure
09/21/1993US5247632 Virtual memory management arrangement for addressing multi-dimensional arrays in a digital data processing system
09/21/1993US5247631 Programmable control of EMS page register addresses
09/21/1993US5247630 M-dimensional computer memory with m-1 dimensional hyperplane access
09/21/1993US5247629 Multiprocessor system with global data replication and two levels of address translation units
09/21/1993US5247386 Laser scanning system
09/21/1993CA1322421C Storage control system in a computer system
09/21/1993CA1322414C Programmable memory data protection scheme
09/16/1993WO1993018463A1 Method and circuitry for minimizing clock-data skew in a bus system
09/16/1993WO1993018461A1 High-performance non-volatile ram protected write cache accelerator system
09/16/1993WO1993018460A1 Process for linking parts of a programme into one programme
09/16/1993WO1993018459A1 Prefetching into a cache to minimize main memory access time and cache size in a computer system
09/16/1993WO1993018458A1 Cache memory device
09/16/1993WO1993018451A1 Elimination of the critical path in memory control unit and input/output control unit operations
09/16/1993WO1993017378A3 Method and apparatus for locating longest prior target string matching current string in buffer
09/16/1993CA2131627A1 High-performance non-volatile ram protected write cache accelerator system
09/15/1993EP0560598A1 Cache memory
09/15/1993EP0560543A2 Computer user interface for relating key and index properties to database table columns
09/15/1993EP0560393A1 Microprocessor and data processing system with register file
09/15/1993EP0560277A1 Method and apparatus for controlling read and write of microcomputer hard disk
09/15/1993EP0560100A1 Adaptive cache miss prediction mechanism
09/15/1993EP0559939A1 Circuit for monitoring memory accesses within a predetermined range
09/15/1993EP0532643A4 Method for optimizing software for any one of a plurality of variant architectures
09/15/1993EP0303661B1 Central processor unit for digital data processing system including write buffer management mechanism
09/14/1993US5245702 Method and apparatus for providing shared off-screen memory
09/14/1993US5245572 Floating gate nonvolatile memory with reading while writing capability
09/14/1993US5245330 Microprocessor-controlled apparatus with improved disabling
09/14/1993US5245320 Multiport game card with configurable address
09/13/1993CA2096807A1 Software distribution apparatus
09/09/1993DE4206569A1 Determination of collision misses in programme elements - using trace procedure to identify overlapping programme sections in cache memory of processing system
09/08/1993EP0559409A1 A method and apparatus for performing a bus arbitration protocol in a data processing system
09/08/1993EP0559220A2 Method and apparatus for storing DOS in high memory area
09/08/1993EP0559142A2 Data storage format conversion method and system, data access method and access control apparatus
09/08/1993EP0559100A2 Method and apparatus for data distribution
09/08/1993EP0558945A2 Storage isolation with subspace-group facility
09/08/1993EP0558733A1 Random access compare array
09/07/1993US5243703 Apparatus for synchronously generating clock signals in a data processing system
09/07/1993US5243701 Method of and system for processing data having bit length variable with modes of operation
09/07/1993US5243575 Address transition detection to write state machine interface circuit for flash memory
09/07/1993US5243175 Method and apparatus for determining the validity of data in an integrated circuit card
09/07/1993CA2091075A1 Method and apparatus for storing dos program in high memory area
09/07/1993CA1322058C Multi-processor computer systems having shared memory and private cache memories
09/02/1993WO1993017393A1 Direct read of block compressed data file
09/02/1993WO1993017386A1 Cache memory apparatus
09/02/1993WO1993017385A1 Dynamic flow instruction cache memory
09/02/1993WO1993017378A2 Method and apparatus for locating longest prior target string matching current string in buffer
09/02/1993DE4305860A1 Memory management unit for computer system - has virtual addresses converted into physical addresses using comparison process and content addressable memory
09/01/1993EP0558222A1 Personal computer system with security features and method
09/01/1993EP0558132A2 Data exchange arrangement
09/01/1993EP0558006A2 Teamwork CAD system and process for teamwork designing
09/01/1993EP0557968A2 Method of rewriting data in EEPROM, and EEPROM card
09/01/1993EP0557908A2 Method and system for avoiding selector loads
09/01/1993EP0557884A1 A data processor having a cache memory
09/01/1993EP0557813A1 System of digital-speech-memory for a telecommunication system
09/01/1993EP0557736A2 A method and system for file system management using a flash-erasable, programmable, read-only memory
09/01/1993EP0253824B1 Paged memory management unit capable of selectively supporting multiple address spaces
08/1993
08/31/1993US5241681 Computer system having an internal cach microprocessor slowdown circuit providing an external address signal
08/31/1993US5241673 System for garbage collecting unused memory space represented by a digraph by assigning values of node identifiers to selected variables based upon predetermined conditions
08/31/1993US5241672 System using the storage level of file updates in nonvolatile memory to trigger saving of RAM to disk and using the file updates to reboot after crash
08/31/1993US5241669 Method and system for sidefile status polling in a time zero backup copy process