| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 06/07/1994 | US5319779 System for searching information using combinatorial signature derived from bits sets of a base signature |
| 06/07/1994 | US5319774 Computer system or network |
| 06/07/1994 | US5319773 Asynchronous resynchronization of a commit procedure |
| 06/07/1994 | US5319769 Memory access circuit for handling data pockets including data having misaligned addresses and different widths |
| 06/07/1994 | US5319768 Control circuit for resetting a snoop valid bit in a dual port cache tag memory |
| 06/07/1994 | US5319766 Duplicate tag store for a processor having primary and backup cache memories in a multiprocessor computer system |
| 06/07/1994 | US5319765 Semiconductor memory unit utilizing a security code generator for selectively inhibiting memory access |
| 06/07/1994 | US5319764 Address detection circuit using a memory |
| 06/07/1994 | US5319761 Directory look-aside table for a virtual storage system including means for minimizing synonym entries |
| 06/07/1994 | US5319760 Translation buffer for virtual machines with address space match |
| 06/07/1994 | US5319759 Burst address sequence generator |
| 06/07/1994 | US5319758 Method for managing multiple virtual storages divided into families |
| 06/07/1994 | US5319755 Integrated circuit I/O using high performance bus interface |
| 06/07/1994 | US5319751 Device driver configuration in a computer system |
| 06/07/1994 | US5319705 Method and system for multimedia access control enablement |
| 06/07/1994 | US5319602 Combination of a printed wiring board and a memory device selecting circuit |
| 06/07/1994 | US5319596 Semiconductor memory device employing multi-port RAMs |
| 06/07/1994 | US5319588 Digital signal processor |
| 06/07/1994 | US5319362 Security system with security access database distributed among individual access devices |
| 06/07/1994 | US5319361 Circuit managing numbers of accesses to logic resources |
| 06/07/1994 | US5319348 Cache memory system, and comparator and MOS analog XOR amplifier for use in the system |
| 06/01/1994 | EP0599707A1 Method for extracting statistical profiles, use of the statistics created by the method |
| 06/01/1994 | EP0599449A2 Data communication system and method |
| 06/01/1994 | EP0599447A1 Data processing apparatus with function of effecting hang-up processing |
| 06/01/1994 | DE4335475A1 Data processing circuit with cache memory - has first and second command transfer memories for single and multiple line commands, and transfers required commands to cache memory |
| 05/31/1994 | US5317754 Method and apparatus for enabling an interpretive execution subset |
| 05/31/1994 | US5317739 Method and apparatus for coupling data processing systems |
| 05/31/1994 | US5317738 Process affinity scheduling method and apparatus |
| 05/31/1994 | US5317731 Intelligent page store for concurrent and consistent access to a database by a transaction processor and a query processor |
| 05/31/1994 | US5317730 System for modifying persistent database based upon set of data elements formed after selective insertion or deletion |
| 05/31/1994 | US5317729 Method for the storage of multi-versioned data with retrieval based on searched query |
| 05/31/1994 | US5317728 Storage management of a first file system using a second file system containing surrogate files and catalog management information |
| 05/31/1994 | US5317727 Method apparatus for determining prefetch operating for a data base |
| 05/31/1994 | US5317723 System and method for automatically relocating and configuring firmware stored in subsystem modules |
| 05/31/1994 | US5317720 Processor system with writeback cache using writeback and non writeback transactions stored in separate queues |
| 05/31/1994 | US5317718 Data processing system and method with prefetch buffers |
| 05/31/1994 | US5317717 Apparatus and method for main memory unit protection using access and fault logic signals |
| 05/31/1994 | US5317716 Multiple caches using state information indicating if cache line was previously modified and type of access rights granted to assign access rights to cache line |
| 05/31/1994 | US5317713 Micro-winchester disk drive having on-board segmented cache memory |
| 05/31/1994 | US5317712 Method and apparatus for testing and configuring the width of portions of a memory |
| 05/31/1994 | US5317711 Structure and method for monitoring an internal cache |
| 05/31/1994 | US5317710 Invalidation of entries in a translation table by providing the machine a unique identification thereby disallowing a match and rendering the entries invalid |
| 05/31/1994 | US5317706 Memory expansion method and apparatus in a virtual memory system |
| 05/31/1994 | US5317705 Apparatus and method for TLB purge reduction in a multi-level machine system |
| 05/31/1994 | US5317704 Storage relocating method and hierarchy storage system utilizing a cache memory |
| 05/31/1994 | US5317693 Computer peripheral device network with peripheral address resetting capabilities |
| 05/31/1994 | US5317638 Data processing system |
| 05/31/1994 | CA2110196A1 Information processing apparatus |
| 05/31/1994 | CA2026334C Technique for information protection on fault-tolerant redundant information storage devices |
| 05/27/1994 | CA2109982A1 Information processing system which can check secondary storage medium having prescribed relation therewith and secondary storage device therefor |
| 05/26/1994 | WO1994011969A1 Apparatus and method for providing data security in a computer system having a removable memory |
| 05/26/1994 | WO1994011829A1 Synchronous smart card authentication and encryption circuit and method |
| 05/26/1994 | WO1994011827A1 Arrangement with plug-in functional units |
| 05/26/1994 | WO1994011826A1 Arrangement with several functional units |
| 05/26/1994 | WO1994011825A1 Arrangement for the addressing of peripheral units |
| 05/26/1994 | WO1994011824A1 Multi-processor computer system |
| 05/26/1994 | WO1994011823A1 Memory storage device having in situ copy protection and data security capability |
| 05/26/1994 | WO1994011769A1 Fiber optic illumination system and method for a high definition light microscope |
| 05/26/1994 | WO1994009433A3 A system for operating application software in a safety critical environment |
| 05/26/1994 | WO1994007211A3 Latent defect handling in eeprom devices |
| 05/26/1994 | DE4239030A1 Anordnung mit steckbaren Funktionseinheiten Arrangement with pluggable function units |
| 05/25/1994 | EP0598570A2 Region configuration system and method for controlling memory subsystem operations by address region |
| 05/25/1994 | EP0598535A1 Pending write-back controller for a cache controller coupled to a packet switched memory bus |
| 05/25/1994 | EP0598507A2 A method and apparatus for preventing inadvertent erasure of data in a memory |
| 05/25/1994 | EP0598417A2 Data processing system having scanner for searching memory for message having top priority and/or identity code identical with new message |
| 05/25/1994 | EP0598058A1 Method of imposing multi-object constraints on data files. |
| 05/25/1994 | EP0591437A4 Multiprocessor distributed initialization and self-test system |
| 05/24/1994 | US5315709 Method and apparatus for transforming objects in data models |
| 05/24/1994 | US5315602 Optimized stripe detection for redundant arrays of disk drives |
| 05/24/1994 | US5315552 Memory module, method for control thereof and method for setting fault bit table for use therewith |
| 05/24/1994 | CA2007061C Arithmetic element controller |
| 05/19/1994 | DE4238593A1 Mehrprozessor-Computersystem The multiprocessing computer system |
| 05/19/1994 | DE4238075A1 Anordnung zur Übertragung von Daten An arrangement for transmitting data |
| 05/18/1994 | EP0597729A1 Method of allowing write-back caching in a write-through environment |
| 05/18/1994 | EP0597706A2 Solid state peripheral storage device |
| 05/18/1994 | EP0597654A1 System and method for multi-format data storage backup of a computer system |
| 05/18/1994 | EP0597601A1 Reflexively sizing memory bus interface |
| 05/18/1994 | EP0597441A1 Microprocessor having a bus-width change function |
| 05/18/1994 | EP0597307A1 Microcomputer and microcomputer system |
| 05/18/1994 | EP0597296A2 Cache architecture for high speed memory-to-I/0 data transfers |
| 05/18/1994 | EP0597143A1 Command processing in a database system |
| 05/18/1994 | EP0541678B1 An arithmetic unit for structure arithmetic |
| 05/18/1994 | CN1086919A Circuit for protecting of data |
| 05/18/1994 | CN1024600C Apparatus and method for enhanced virtul to real address translation for accessing a cache memory unit |
| 05/18/1994 | CN1024599C Method and apparatus for maintaining cache integrity |
| 05/17/1994 | US5313646 Method and apparatus for translucent file system |
| 05/17/1994 | US5313631 Dual threshold system for immediate or delayed scheduled migration of computer data files |
| 05/17/1994 | US5313630 System of object oriented inheritance using the temporal status of superclasses |
| 05/17/1994 | US5313629 Unit of work for preserving data integrity of a data-base by creating in memory a copy of all objects which are to be processed together |
| 05/17/1994 | US5313613 Execution of storage-immediate and storage-storage instructions within cache buffer storage |
| 05/17/1994 | US5313612 Information recording and reproducing apparatus including both data and work optical disk drives for restoring data and commands after a malfunction |
| 05/17/1994 | US5313611 Method and apparatus for maintaining a lookup table for storing function values |
| 05/17/1994 | US5313609 Optimum write-back strategy for directory-based cache coherence protocols |
| 05/17/1994 | US5313608 Microprocessor with cache memory for supporting debugging operations |
| 05/17/1994 | US5313607 Direct memory access controller |
| 05/17/1994 | US5313606 In a data processor that fetches instructions |
| 05/17/1994 | US5313605 High bandwith output hierarchical memory store including a cache, fetch buffer and ROM |
| 05/17/1994 | US5313603 Arrangement of controlling memory access requests to grouped memory banks |
| 05/17/1994 | US5313602 Multiprocessor system and method of control over order of transfer of data between buffer storages |
| 05/17/1994 | US5313601 Request control apparatus |