| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 03/09/1993 | US5193075 Static memory containing sense AMP and sense AMP switching circuit |
| 03/09/1993 | CA1314331C Easily upgradable video memory system and method |
| 03/09/1993 | CA1314330C Method and apparatus for selectively posting write cycles using the 82385 cache controller |
| 03/04/1993 | WO1993004462A1 Computer graphics system |
| 03/04/1993 | WO1993004436A1 Concurrent-use multi-user relational database management system and method |
| 03/04/1993 | WO1993004432A2 High-performance dynamic memory system |
| 03/04/1993 | WO1993004430A1 Self-configuration of memory addresses for computer memory having multiple memory module types |
| 03/04/1993 | WO1993004429A2 Method of generating multidimensional addresses in an imaging and graphics processing system |
| 03/04/1993 | DE4227733A1 Configurable cache memory for data processing of video information - receives data sub-divided into groups controlled in selection process |
| 03/04/1993 | CA2077422A1 Motor-operated window cover |
| 03/03/1993 | EP0530009A2 Method of characterising genomic DNA |
| 03/03/1993 | EP0529945A2 Method and apparatus for programmable memory control with error regulation and test functions |
| 03/03/1993 | EP0529844A2 Method and apparatus for deriving object type and obtaining object type attribute values |
| 03/03/1993 | EP0529787A2 Network management agent with user created objects |
| 03/03/1993 | EP0529557A2 Apparatus for preventing computer data destructively read out from storage unit |
| 03/03/1993 | EP0529217A1 Real time cache implemented by dual purpose on-chip memory |
| 03/03/1993 | CN1020014C Method of rapidly opening disk files identified by path names |
| 03/03/1993 | CN1020005C Microcomputer system employing address offset mechanism to increase supported cache memory capacity |
| 03/02/1993 | US5191611 Method and apparatus for protecting material on storage media and for transferring material on storage media to various recipients |
| 03/02/1993 | CA1314108C Distributed reference and change table for a virtual memory system |
| 03/02/1993 | CA1314107C Cache with at least two different fill sizes |
| 03/02/1993 | CA1314103C Delayed cache write enable circuit for a dual bus microcomputer system with an 80386 and 82385 |
| 02/28/1993 | CA2077264A1 Method of characterisation |
| 02/24/1993 | EP0528585A1 Processing system with internal instruction cache |
| 02/24/1993 | EP0528584A1 Directory look-aside table for a virtual data storage system |
| 02/24/1993 | EP0528538A2 Mirrored memory multi processor system |
| 02/24/1993 | EP0528518A2 Fault-tolerant solid-state flight recorder |
| 02/24/1993 | EP0528273A2 Buffer memory and method of managing the same |
| 02/24/1993 | EP0528234A2 Data processing system for generating data bits based on stored data |
| 02/18/1993 | WO1993003448A1 Method of imposing multi-object constraints on data files |
| 02/18/1993 | WO1993003436A1 Method and apparatus for reducing lock period of shared buffer |
| 02/18/1993 | WO1993003435A1 Method and apparatus for identifying memory leaks and tracking pointers in a computer program |
| 02/17/1993 | EP0527622A2 Formula processor |
| 02/17/1993 | EP0249090B1 Database index journaling for enhanced recovery |
| 02/16/1993 | US5187793 Processor with hierarchal memory and using meta-instructions for software control of loading, unloading and execution of machine instructions stored in the cache |
| 02/16/1993 | US5187792 Method and apparatus for selectively reclaiming a portion of RAM in a personal computer system |
| 02/16/1993 | US5187789 Graphical display of compiler-generated intermediate database representation |
| 02/16/1993 | US5187787 Apparatus and method for providing decoupling of data exchange details for providing high performance communication between software processes |
| 02/16/1993 | US5187783 Controller for direct memory access |
| 02/16/1993 | US5187779 Memory controller with synchronous processor bus and asynchronous i/o bus interfaces |
| 02/16/1993 | US5187778 Input/output system |
| 02/11/1993 | DE4226073A1 Semiconductor memory device cotg. reading control circuit - prohibiting reading of one or more bits from multibit data emitted form several memory cells |
| 02/10/1993 | EP0527010A2 Protection system for critical memory information |
| 02/10/1993 | EP0526930A1 A processor buffered interface for multiprocessor systems |
| 02/10/1993 | EP0526516A1 Apparatus for and method of structuring or storing data within a file |
| 02/09/1993 | US5185885 Object database deletion method for child objects when a child may be linked to multiple parent objects |
| 02/09/1993 | US5185884 Computer controlled optimized pairing of disk units |
| 02/09/1993 | US5185879 Cache system and control method therefor |
| 02/09/1993 | US5185878 Programmable cache memory as well as system incorporating same and method of operating programmable cache memory |
| 02/09/1993 | US5185875 Method and apparatus for reducing memory read latency in a shared memory system with multiple processors |
| 02/09/1993 | US5185861 In an automobile |
| 02/09/1993 | US5185748 Dual data check apparatus |
| 02/09/1993 | US5185724 Image memory |
| 02/09/1993 | US5185694 Data processing system utilizes block move instruction for burst transferring blocks of data entries where width of data blocks varies |
| 02/06/1993 | CA2072504A1 Protection system for critical memory information |
| 02/04/1993 | WO1993002417A1 Memory management method |
| 02/04/1993 | DE4225228A1 Initial call-up buffer for data processing system - is used with computer system with CPU between cache memory and main memory |
| 02/03/1993 | EP0526221A1 Data processing system with progressively programmable nonvolatile memory and method therefor |
| 02/03/1993 | EP0526114A1 A method and apparatus for performing address translation in a data processor using masked protection indirection page descriptors |
| 02/03/1993 | EP0526035A2 Method and apparatus for operating a computer-based file system |
| 02/03/1993 | EP0526034A2 Method and apparatus for accessing a computer-based file system |
| 02/03/1993 | EP0526030A1 Read and write circuitry for a memory |
| 02/03/1993 | EP0526029A1 Read and write circuitry for a memory |
| 02/03/1993 | EP0525941A2 Method of self-diagnosing a mobile telephone set for use in a mobile telephone switching system and mobile telephone set being applied to the method |
| 02/03/1993 | EP0525749A1 Memory control device |
| 02/03/1993 | EP0525427A2 Non-text object storage and retrieval |
| 02/03/1993 | EP0525425A2 Video RAM architecture incorporating hardware decompression |
| 02/03/1993 | EP0525308A1 Memory map for processor cache macro |
| 02/03/1993 | EP0525221A1 Quasi-synchronous information transfer and phase alignment means for enabling same |
| 02/03/1993 | EP0525068A1 Integrated circuit i/o using a high preformance bus interface |
| 02/03/1993 | EP0525056A1 Real time insurance administration and medical information utility |
| 02/03/1993 | EP0173515B1 Error recovery system in a data processor having a control storage |
| 02/02/1993 | US5184325 Dynamic associative memory with logic-in-refresh |
| 02/02/1993 | US5184320 Cached random access memory device and system |
| 02/02/1993 | CA1313424C Nonhierarchical program authorization mechanism |
| 02/02/1993 | CA1313423C2 Memory access control system |
| 02/02/1993 | CA1313422C2 Cache memory control system |
| 02/02/1993 | CA1313418C User interface with system and method for specifying same |
| 02/02/1993 | CA1313415C Virtual display adapter |
| 01/30/1993 | CA2066559A1 Non-text object storage and retrieval |
| 01/27/1993 | EP0524468A2 High definition multimedia display |
| 01/26/1993 | US5182809 Dual bus microcomputer system with programmable control of lock function |
| 01/26/1993 | US5182802 Data addressable memory architecture and method of forming a data addressable memory |
| 01/26/1993 | US5182801 Apparatus and method for providing fast data transfer between multiple devices through dynamic reconfiguration of the memory space of the devices |
| 01/26/1993 | CA1313276C2 Very large scale computer |
| 01/26/1993 | CA1313274C Control of pipelined operation in a microcomputer system employing dynamic bus sizing with 80386 processor and 82385 cache controller |
| 01/26/1993 | CA1313269C Method and apparatus for predicting valid performance of virtual-address to physical-address translations |
| 01/21/1993 | WO1993001563A1 Risc microprocessor architecture with isolated architectural dependencies |
| 01/21/1993 | WO1993001553A1 Microprocessor architecture capable of supporting multiple heterogeneous processors |
| 01/21/1993 | WO1993001552A1 Asynchronous modular bus architecture with burst capability |
| 01/21/1993 | DE4216871A1 Ausfuehrungsordnen zum sicherstellen der serienherstellbarkeit verteilter transaktionen Ausfuehrungsordnen to ensure the serienherstellbarkeit distributed transactions |
| 01/21/1993 | CA2074008A1 Quasi-synchronous information transfer and phase alignment means for enabling same |
| 01/20/1993 | EP0523997A1 Integrated circuit memory device |
| 01/20/1993 | EP0523996A1 Integrated circuit memory device with redundant rows |
| 01/20/1993 | EP0523995A1 Integrated circuit memory device having flash clear |
| 01/20/1993 | EP0494913A4 Electro-active cradle circuits for the detection of access or penetration |
| 01/20/1993 | CN1068212A Read-write controller for hard disk of microcomputer |
| 01/19/1993 | CA1312963C Software configurable memory architecture for data processing system having graphics capability |
| 01/19/1993 | CA1312958C Data processing system for utilizing a memory-mapped coprocessor within a limited address space |
| 01/19/1993 | CA1312950C Method of managing data in a data storage hierarchy and a data storage hierarchy therefor |