Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
11/2001
11/20/2001US6320445 Circuitry and a method for introducing a delay
11/20/2001US6320444 Initial phase control of an oscillator
11/20/2001US6320443 RC delay time stabilizing circuit
11/20/2001US6320438 Duty-cycle correction driver with dual-filter feedback loop
11/20/2001US6320437 Duty cycle regulator
11/20/2001US6320434 Circuit and method for generating a synchronous clock signal
11/20/2001US6320429 Integrated circuit having a comparator circuit including at least one differential amplifier
11/20/2001US6320428 Semiconductor integrated circuit device
11/20/2001US6320427 High-speed, low-power continuous-time CMOS current comparator
11/20/2001US6320422 Complementary source coupled logic
11/20/2001US6320407 Semiconductor circuit having output circuit whose slew rate can be adjusted, apparatus and method for automatically adjusting slew rate of output circuit in semiconductor circuit
11/20/2001US6320406 Methods and apparatus for a terminated fail-safe circuit
11/15/2001WO2001086397A2 Apparatus for a radiation hardened clock splitter
11/15/2001WO2000059113A9 Pulse clock/signal delay apparatus and method
11/15/2001US20010040932 Communications terminal having a receiver and method for removing known interferers from a digitized intermediate frequency signal
11/15/2001US20010040474 Clock control method and circuit
11/15/2001US20010040473 Variable delay circuit having a ramp voltage generating unit
11/15/2001US20010040472 Method and circuitry for supplying clock to internal circuit
11/14/2001EP0834116B1 Circuit for comparing two electrical quantities
11/14/2001CN1074869C Computing amplifier and digital signal transmission circuit
11/13/2001US6317417 Method and apparatus for dynamic signal modification on a parallel bus
11/13/2001US6317001 Compensation of timing errors caused by dynamic thermal mismatch
11/13/2001US6316984 Interface circuit
11/13/2001US6316981 Signal distribution network on backside of substrate
11/13/2001US6316980 Calibrating data strobe signal using adjustable delays with feedback
11/13/2001US6316979 Integrated circuit data latch driver circuit
11/13/2001US6316976 Method and apparatus for improving the performance of digital delay locked loop circuits
11/13/2001US6316971 Comparing and amplifying detector circuit
11/08/2001WO2001084711A1 Pulse detector
11/08/2001WO2001084710A1 Power adaptive frequency divider
11/08/2001US20010038311 Differential amplifier circuit and pull up-type differential driver
11/07/2001EP1152536A1 System and method for maintaining lock of a phase locked loop feedback during clock halt
11/07/2001EP1152530A1 Circuit for providing a logical output signal in accordance with crossing points of differential signals
11/07/2001EP1151538A1 Comparator circuit
11/07/2001EP0745286B1 LOW-VOLTAGE BiCMOS DIGITAL DELAY CHAIN SUITABLE FOR OPERATION OVER A WIDE POWER SUPPLY RANGE
11/07/2001CN1321003A Short-delay MF or HF clock pulse width regulating circuit
11/07/2001CN1321002A Long-delay clock pulse width regulating circuit
11/06/2001US6314151 Phase comparator operable at half frequency of input signal
11/06/2001US6314052 Delayed locked loop implementation in a synchronous dynamic random access memory
11/06/2001US6313696 Differential buffer having common-mode rejection
11/06/2001US6313694 Internal power voltage generating circuit having a single drive transistor for stand-by and active modes
11/06/2001US6313686 Waveform output device with EMI noise canceler mechanism
11/06/2001US6313681 Variable delay circuit
11/06/2001US6313679 Timing circuit
11/06/2001US6313678 Single-pin externally controlled edge rate controller circuit
11/06/2001US6313676 Synchronous type semiconductor integrated circuit having a delay monitor controlled by a delay control signal obtained in a delay measuring mode
11/06/2001US6313674 Synchronizing circuit for generating internal signal synchronized to external signal
11/06/2001US6313667 Apparatus and method for a turn around stage having reduced power consumption, Class AB behavior, low noise and low offset
11/06/2001US6313622 Power source voltage controller
11/01/2001WO2001082485A1 Delay clock pulse-width adjusting circuit for intermediate frequency or high frequency
11/01/2001US20010036110 Pulse generator circuit and semiconductor memory provided with the same
11/01/2001US20010035784 Digital phase control circuit
11/01/2001US20010035782 Clock distributing circuit in programmable logic device
11/01/2001US20010035781 Power adaptive frequency divider
11/01/2001US20010035780 Clock period sensing circuit
11/01/2001US20010035779 Low-noise buffer circuit
11/01/2001US20010035777 Transistor-mismatch-insensitive current comparator cell
10/2001
10/31/2001EP1150427A2 Clock control circuit and method
10/31/2001EP1149379A1 Device for writing information onto an information carrier
10/31/2001DE10020171A1 Pulsdetektor Pulse detector
10/31/2001CN1319788A Clock control circuit and method
10/30/2001US6310822 Delay locking high speed clock synchronization method and circuit
10/30/2001US6310509 Differential multiplexer with high bandwidth and reduced crosstalk
10/30/2001US6310506 Programmable setup/hold time delay network
10/30/2001US6310505 Semiconductor integrated circuit, delay-locked loop having the same circuit, self-synchronizing pipeline type system, voltage-controlled oscillator, and phase-locked loop
10/30/2001US6310503 Delay circuit having a constant delay time
10/30/2001US6310499 Methods and apparatus for adjusting the deadtime between non-overlapping clock signals
10/30/2001US6310498 Digital phase selection circuitry and method for reducing jitter
10/30/2001US6310495 Clock wave noise reducer
10/30/2001US6310409 Optically programmable arbitrary temporal profile electric generator
10/25/2001US20010033630 Delay lock loop with clock phase shifter
10/25/2001US20010033515 Booster circuit for raising voltage by sequentially transferring charges from input terminals of booster units to output terminals thereof in response to clock signals having different phases
10/25/2001US20010033158 Phase shift circuit and FM detector circuit
10/24/2001EP1148682A2 Adaptive data slicer with two peak detectors and averaging means to obtain the optimal threshold
10/24/2001EP1148647A2 Circuit arrangement for receiving at least two digital signals
10/24/2001EP1148646A1 Method of optimising digital signal sampling
10/24/2001EP1148645A2 Phase shift circuit and fm detector circuit
10/24/2001EP1147601A1 Level shift circuit
10/24/2001EP0908013B1 Delay circuit and method
10/24/2001CN2456373Y Super-quick pulse generator with program random shaping
10/24/2001CN2456372Y Circuit module with external voltage dropping circuit
10/23/2001US6307416 Integrated circuit for producing two output clock signals at levels which do not overlap in time
10/23/2001US6307415 Hysteresis circuit
10/23/2001US6307412 Clock monitor circuit and synchronous semiconductor memory device utilizing the circuit
10/23/2001US6307403 Delay time control circuit
10/23/2001CA2196712C Resistance bridge and its use in conversion systems
10/18/2001WO2001078235A1 Sliding-window based signal monitoring
10/18/2001WO2001078234A1 Delay circuit and ring oscillator
10/18/2001WO2001078233A1 Process strength indicator
10/18/2001US20010031027 Method and apparatus for high-speed edge-programmable timing signal generation
10/18/2001US20010030903 Clock generating circuit ensuring a wide lock-allowing frequency range and allowing reduction in layout area as well as a semiconductor device provided with the same
10/18/2001US20010030567 Apparatus for a radiation hardened clock splitter
10/18/2001US20010030566 Load equalization in digital delay interpolators
10/18/2001US20010030565 Multiphase clock generator and selector circuit
10/18/2001US20010030562 Methods and circuits for correcting a duty-cycle of a signal by delaying the signal and generating an output signal responsive to state transitions of the signal and the delayed version of the signal
10/17/2001EP1146644A2 Method and circuit for correcting a duty-cycle of a signal
10/17/2001EP1146643A2 Phase shifter for use in a quadrature clock generator
10/17/2001EP1146642A2 Phase shifter for use in a quadrature clock generator
10/17/2001EP1146641A1 Automatic test equipment for semiconductor device
10/17/2001EP1145432A1 Anti-jitter circuits
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