| Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714) |
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| 01/29/2002 | US6342797 Delayed locked loop clock generator using delay-pulse-delay conversion |
| 01/29/2002 | US6342796 Delay locked loop having fast locking time |
| 01/24/2002 | WO2002007314A1 Switching control circuit |
| 01/24/2002 | US20020010902 Field programmable gate array (FPGA) bit stream cormat |
| 01/24/2002 | US20020009169 Skew correction apparatus |
| 01/24/2002 | US20020008587 Methods of compensating for wafer parameters |
| 01/24/2002 | US20020008565 Differencing non-overlapped dual-output amplifier circuit |
| 01/24/2002 | US20020008560 Variable delay circuit and semiconductor integrated circuit device |
| 01/24/2002 | US20020008558 Clock generation circuit, control method of clock generation circuit and semiconductor memory device |
| 01/24/2002 | US20020008556 Delay-locked loop with binary-coupled capacitor |
| 01/24/2002 | US20020008554 Apparatus and method for tracking between data and echo clock |
| 01/24/2002 | US20020008550 Sense amplifier of semiconductor integrated circuit |
| 01/24/2002 | US20020008549 Pseudo-differential current sense amplifier with hysteresis |
| 01/24/2002 | US20020008548 Device for detecting abnormality of clock signal |
| 01/24/2002 | US20020008540 Multi-master multi-slave system bus in a field programmable gate array (FPGA) |
| 01/24/2002 | US20020008251 Output stage for high-speed comparator circuits |
| 01/23/2002 | EP1175052A2 Buffer storage arrangment |
| 01/23/2002 | CN1332520A Pulse generator for static clock |
| 01/22/2002 | US6340941 Digital-signal forming circuit |
| 01/22/2002 | US6340911 Level conversion circuit having differential circuit employing MOSFET |
| 01/22/2002 | US6340910 Clock signal control method and circuit and data transmitting apparatus employing the same |
| 01/22/2002 | US6340909 Method and apparatus for phase interpolation |
| 01/22/2002 | US6340906 Flip-flop control circuit, processor, and method for operating processor |
| 01/22/2002 | US6340904 Method and apparatus for generating an internal clock signal that is synchronized to an external clock signal |
| 01/22/2002 | US6340902 Semiconductor device having multiple power-supply nodes and capable of self-detecting power-off to prevent erroneous operation |
| 01/22/2002 | US6340901 Measurement of signal propagation delay using arbiters |
| 01/22/2002 | US6340900 Phase detector with minimized phase detection error |
| 01/22/2002 | CA2233527C Pulse amplifier with low-duty cycle errors |
| 01/17/2002 | WO2002005427A1 Circuit for generating an inverse signal of a digital signal with a minimal delay difference between the inverse signal and the digital signal |
| 01/17/2002 | US20020007466 Wander generator having arbitrary TDEV mask characteristic setting apparatus |
| 01/17/2002 | US20020006179 Fractional N-divider, and frequency synthesizer provided with a fractional N-divider |
| 01/17/2002 | US20020006178 Digital PLL pulse generating apparatus |
| 01/17/2002 | US20020005747 Semiconductor device with signal transfer line |
| 01/17/2002 | US20020005746 Internal clock generator generating an internal clock signal having a phase difference with respect to an external clock signal |
| 01/17/2002 | US20020005743 Slew rate adjusting circuit |
| 01/17/2002 | US20020005741 DLL circuit that can prevent erroneous operation |
| 01/17/2002 | US20020005739 Comparing circuit and demodulator circuit using same |
| 01/17/2002 | DE10131112A1 Komparator und Steuerschaltung für einen Leistungs-MOSFET Comparator and control circuit for a power MOSFET |
| 01/17/2002 | DE10103307A1 Semiconductor integrated circuit includes sub and main reset signal generator system |
| 01/17/2002 | DE10050337C1 Transceiver transmission signal maximum amplitude reduction method incorporates compensation of echo signal variation resulting from amplitude limitation |
| 01/17/2002 | DE10033109A1 Clock signal generator uses discrete timing oscillator and comparison of signal phase of discrete timing output signal with phase of highest value bits of latter signal for phase correction |
| 01/17/2002 | DE10031946A1 Digital integrated circuit with built-in timing delay circuit for e.g. autorefresh DRAM, has regulatable current source in timing circuit to produce output signal with a delay with respect to reference timing |
| 01/16/2002 | EP1012973B1 Digital circuit with filter unit for suppressing glitches |
| 01/16/2002 | EP0974193B1 Optically programmable arbitrary temporal profile electric generator |
| 01/15/2002 | US6339553 Clock generating circuit having additional delay line outside digital DLL loop and semiconductor memory device including the same |
| 01/15/2002 | US6339355 Offsetting comparator device and comparator circuit |
| 01/15/2002 | US6339354 System and method for eliminating pulse width variations in digital delay lines |
| 01/15/2002 | US6339353 Input circuit of a memory having a lower current dissipation |
| 01/15/2002 | US6339350 Phase difference—current conversion circuit |
| 01/15/2002 | US6339346 Low skew signal generation circuit |
| 01/15/2002 | US6339345 Semiconductor device equipped with output circuit adjusting duration of high and low levels |
| 01/10/2002 | WO2002003552A2 Rc-timer scheme |
| 01/10/2002 | WO2002003551A2 Digital delay element |
| 01/10/2002 | US20020003445 Signal distribution scheme in field programmable gate array (FPGA) or field programmable system chip (FPSC) including cycle stealing units |
| 01/10/2002 | US20020003444 Semiconductor integrated circuit |
| 01/10/2002 | US20020003436 Double data rate input and output in a programmable logic device |
| 01/10/2002 | US20020003435 Multi-functional I/O buffers in a field programmable gate array (FPGA) |
| 01/10/2002 | US20020003243 Semiconductor integrated circuit and layout design method thereof |
| 01/10/2002 | DE10130732A1 Signal transmission circuit for a data latch circuit includes controllable delay circuit with signal delay comparison system |
| 01/09/2002 | EP1170857A2 Electronic equipment containing a frequency multiplying circuitm a frequency multiplying circuit, and a procedure for multiplying signals |
| 01/08/2002 | US6337886 Bit rate-selective type optical receiver, optical regenerative repeater and automatic bit rate discriminating method |
| 01/08/2002 | US6337649 Comparator digital noise filter |
| 01/08/2002 | US6337591 Circuitry for a high voltage linear current sense IC |
| 01/08/2002 | US6337588 Apparatus and method for doubling the frequency of a clock signal |
| 01/03/2002 | WO2001065681A3 Fractional-phase locked loop |
| 01/03/2002 | US20020001342 Carrousel handshake |
| 01/03/2002 | US20020000860 Method and apparatus for single-ended sense amplifier and biasing |
| 01/03/2002 | US20020000859 Method and apparatus for single-ended sense amplifier and biasing |
| 01/03/2002 | US20020000851 Timing-control circuit device and clock distribution system |
| 01/03/2002 | US20020000848 Bus driver circuit |
| 01/03/2002 | US20020000844 Comparator and a control circuit for a power MOSFET |
| 01/03/2002 | US20020000843 Input Buffer Circuit For RF Phase-Locked Loops |
| 01/03/2002 | US20020000836 Phase detector |
| 01/03/2002 | DE10058231A1 Datensynchronisationsschaltung und diese enthaltendes Mehrfachbank-Speicherbauelement Data synchronization circuit and these containing multiple bank memory device |
| 01/02/2002 | EP1167985A2 Wander generator having arbitrary TDEV mask characteristic setting apparatus |
| 01/02/2002 | EP1166445A1 Pulse clock/signal delay apparatus and method |
| 01/01/2002 | US6335948 Amplitude detector and equalizer |
| 01/01/2002 | US6335885 Semiconductor device having a delay circuit for adjusting the timing of control signals |
| 01/01/2002 | US6335696 Parallel-serial conversion circuit |
| 01/01/2002 | US6335650 Method and apparatus for adjusting time delays in circuits with multiple operating supply voltages |
| 01/01/2002 | US6335647 Skew adjusting circuit |
| 01/01/2002 | US6335641 Automatic input threshold selector |
| 12/30/2001 | CA2313286A1 Digital delay element |
| 12/27/2001 | WO2001099329A1 Error estimation method and apparatus |
| 12/27/2001 | WO2001099290A2 Digital noise-shaping filter with real coefficients and method for making the same |
| 12/27/2001 | WO2001099278A2 Symmetric clock receiver for differential input signals |
| 12/27/2001 | US20010055357 Clock signal selection system, method of generating a clock signal and programmable clock manager including same |
| 12/27/2001 | US20010055344 Signal transmission circuit and method for equalizing disparate delay times dynamically, and data latch circuit of semiconductor device implementing the same |
| 12/27/2001 | US20010054926 Synchronous delay circuit |
| 12/27/2001 | US20010054924 Logic circuit having phase-controlled data receiving interface |
| 12/27/2001 | US20010054922 Delay locked loop circuit capable of adjusting phase of clock with high precision |
| 12/27/2001 | US20010054921 Semiconductor integrated circuit and method for initializing the same |
| 12/27/2001 | US20010054920 Semiconductor device capable of internally adjusting delayed amount of a clock signal |
| 12/27/2001 | US20010054919 Electronic device comprising a frequency multiplier circuit, frequency multiplier circuit and method of multiplying signal frequencies |
| 12/25/2001 | US6333959 Cross feedback latch-type bi-directional shift register in a delay lock loop circuit |
| 12/25/2001 | US6333896 Delay locked loop for use in synchronous dynamic random access memory |
| 12/25/2001 | US6333709 Analog to digital converter using remainder feedback loop |
| 12/25/2001 | US6333661 Insulated-gate transistor signal input device |
| 12/25/2001 | US6333660 Semiconductor device using complementary clock and signal input state detection circuit used for the same |
| 12/25/2001 | US6333659 Clock control method and circuit |