Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714) |
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07/24/2002 | EP1224741A1 Communications terminal having a receiver and method for removing known interferers from a digitized intermediate frequency signal |
07/24/2002 | EP1224738A1 Low jitter phase-locked loop with duty-cycle control |
07/24/2002 | CN1360757A Circuit arrangement for generating current impulses in supply current of integrated circuits |
07/24/2002 | CN1360397A Formation of pulse signal from clock signal |
07/24/2002 | CN1360396A Clock and data restoring circuit and its clock control method |
07/23/2002 | US6424927 Computer-based real-time transient pulse monitoring system and method |
07/23/2002 | US6424199 Semiconductor device using complementary clock and signal input state detection circuit used for the same |
07/23/2002 | US6424197 Rising and falling edge aperture delay control circuit in analog front end of imaging system |
07/23/2002 | US6424193 Circuit for synchronizing frequencies of clock signals |
07/23/2002 | US6424190 Apparatus and method for delay matching of full and divided clock signals |
07/23/2002 | US6424183 Current comparator |
07/23/2002 | US6424178 Method and system for controlling the duty cycle of a clock signal |
07/18/2002 | WO2002056558A2 Active filter circuit with dynamically modifiable internal gain |
07/18/2002 | WO2002056474A2 Clock interpolation through capacitive weighting |
07/18/2002 | WO2002056470A1 Active filter circuit with dynamically modifiable gain |
07/18/2002 | WO2002017050A3 Noise-shaped digital frequency synthesis |
07/18/2002 | WO2002003552A3 Rc-timer scheme |
07/18/2002 | US20020093387 Synchronous signal generator |
07/18/2002 | US20020093370 Delay circuit using current source |
07/18/2002 | DE10063686A1 Schaltungsanordnung zur Pegelerhöhung, insbesondere zum Ansteuern einer programmierbaren Verbindung Circuit arrangement for the level increase, especially for driving a programmable link |
07/17/2002 | EP1223704A2 Oversampling clock recovery having a high follow-up character using a few clock signals |
07/17/2002 | EP1223668A2 Synchronous signal generator |
07/17/2002 | EP1223493A1 Power supply control device, semiconductor device and method of driving semiconductor device |
07/17/2002 | CN1087884C Simple high-efficiency separated insulated-gate high-power component driving circuit |
07/16/2002 | US6421784 Programmable delay circuit having a fine delay element selectively receives input signal and output signal of coarse delay element |
07/16/2002 | US6421404 Phase-difference detector and clock-recovery circuit using the same |
07/16/2002 | US6421258 Current zero crossing detecting circuit |
07/16/2002 | US6420927 Filter and hold circuit utilizing a charge/discharge current |
07/16/2002 | US6420922 Timing controller and controlled delay circuit for controlling timing or delay time of a signal by changing phase thereof |
07/16/2002 | US6420921 Delay signal generating apparatus and semiconductor test apparatus |
07/16/2002 | US6420920 Method and apparatus for phase-splitting a clock signal |
07/16/2002 | US6420910 Quasi-current sensing input impedance controlled preamplifier for magnetoresistive elements |
07/16/2002 | US6420909 Comparators |
07/16/2002 | CA2367629A1 Synchronous signal generator |
07/11/2002 | WO2002054598A2 Precision phase generator |
07/11/2002 | WO2002054596A1 Method and apparatus for a failure-free synchronizer |
07/11/2002 | WO2002054593A2 Digital frequency multiplier |
07/11/2002 | US20020091891 Passive release avoidance technique |
07/11/2002 | US20020089885 Method of scaling digital circuits and controlling the timing relationship between digital circuits |
07/11/2002 | US20020089365 Apparatus and method for obtaining stable delays for clock signals |
07/11/2002 | US20020089358 Digital frequency multiplier |
07/11/2002 | US20020089355 Differential comparison circuit |
07/11/2002 | DE10143051A1 Verzögerungsfangschaltung zum Reduzieren der Last einer variablen Verzögerungseinheit beim Hochfrequenzbetrieb und zum stabilen Verriegeln eines externen Taktsignals Fishing delay circuit for reducing the burden of a variable delay unit at high frequency operation and stable locking an external clock signal |
07/11/2002 | DE10136163A1 Konfiguration zur Erzeugung eines Taktes mit einer Verzögerungsschaltung und ein Verfahren hierfür Configuration for generating a clock having a delay circuit and a method thereof |
07/09/2002 | US6417776 Input buffer circuit having function for detecting cable connection |
07/09/2002 | US6417715 Clock generation circuit generating internal clock of small variation in phase difference from external clock, and semiconductor memory device including such clock generation circuit |
07/09/2002 | US6417714 Method and apparatus for obtaining linear code-delay response from area-efficient delay cells |
07/09/2002 | US6417713 Programmable differential delay circuit with fine delay adjustment |
07/09/2002 | US6417712 Phase shifter using sine and cosine weighting functions |
07/09/2002 | US6417709 Automatic duty cycle controller for ultra high speed digital multiplexer |
07/09/2002 | US6417708 Resistively-loaded current-mode output buffer with slew rate control |
07/09/2002 | US6417707 Noise reduction circuits |
07/09/2002 | US6417706 Internal clock generator generating an internal clock signal having a phase difference with respect to an external clock signal |
07/09/2002 | US6417701 Method and apparatus for identifying a waveform period |
07/09/2002 | US6417699 Comparator circuits |
07/04/2002 | WO2002052725A2 Delay circuit having adjustable delay |
07/04/2002 | WO2002052570A1 Techniques to synchronously operate a synchronous memory |
07/04/2002 | US20020087614 Programmable tuning for flow control and support for CPU hot plug |
07/04/2002 | US20020087217 Device and method for generating synchronous numeric signals |
07/04/2002 | US20020085442 Semiconductor integrated circuit device |
07/04/2002 | US20020084864 Modulation device of the pulse width of very high-frequency signals |
07/04/2002 | US20020084857 Delay locked loop for improving high frequency characteristics and yield |
07/04/2002 | US20020084849 Comparator with a large input voltage excursion |
07/04/2002 | US20020084841 Data receiver capable of invalidating erroneous pulses |
07/04/2002 | US20020084838 Rail-to-rail input clocked amplifier |
07/04/2002 | US20020084826 Reduced current variability I/O bus termination |
07/04/2002 | US20020084822 Clock interruption detection circuit |
07/04/2002 | US20020084820 Reduction of propagation delay dependence on supply voltage in a digital circuit |
07/04/2002 | US20020084818 Duty cycle correction circuit |
07/04/2002 | US20020084817 Duty cycle control loop |
07/04/2002 | US20020084816 Precision phase generator |
07/04/2002 | DE10164200A1 Datenempfänger zum Ungültigsetzen fehlerhafter Impulse Data receiver for invalidation of erroneous pulses |
07/04/2002 | DE10062373A1 Generating clock signal involves reference clock unit generating clock signal to clock and/or synchronize circuit unit if clock signal normally received from another clock unit fails |
07/03/2002 | EP1220449A2 Amplifier |
07/02/2002 | US6414557 High noise rejection voltage-controlled ring oscillator architecture |
07/02/2002 | US6414540 Input filter stage for a data stream, and method for filtering a data stream |
07/02/2002 | US6414532 Gate ground circuit approach for I/O ESD protection |
07/02/2002 | US6414530 Semiconductor integrated circuit device, semiconductor memory system and clock synchronous circuit |
07/02/2002 | US6414528 Clock generation circuit, serial/parallel conversion device and parallel/serial conversion device together with semiconductor device |
07/02/2002 | US6414527 Semiconductor device replica circuit for monitoring critical path and construction method of the same |
07/02/2002 | US6414526 Delay-locked loop circuit |
07/02/2002 | US6414521 Sense amplifier systems and methods |
07/02/2002 | US6414517 Input buffer circuits with input signal boost capability and methods of operation thereof |
06/27/2002 | WO2002051008A2 Voltage-controlled oscillator with ac coupling to produce highly accurate duty cycle square wave output |
06/27/2002 | WO2002051006A1 Circuit arrangement for level amplification in particular for controlling a programmable connection |
06/27/2002 | WO2002051003A2 Generating two signals having a mutual phase difference of 90° |
06/27/2002 | WO2002051001A2 A bias circuit for a low voltage differential circuit |
06/27/2002 | US20020083358 Generation of pulse signals from a clock signal |
06/27/2002 | US20020083286 Techniques to asynchronously operate a synchronous memory |
06/27/2002 | US20020080718 Generating two signals having a mutual phase difference of 90° |
06/27/2002 | US20020079941 Duty cycle correction circuits that reduce distortion caused by mismatched transistor pairs |
06/27/2002 | US20020079940 Dynamic duty cycle adjuster |
06/27/2002 | US20020079939 Method for automatic duty cycle control using adaptive body bias control |
06/27/2002 | US20020079938 Clock and data recovery circuit and clock control method |
06/27/2002 | US20020079925 Circuit configuration for programming a delay in a signal path |
06/27/2002 | DE10152102A1 Vorrichtung zum Detektieren von Eingangssignalflanken zur Signalverarbeitungsausführung auf der Basis von Flankenzeitsteuerungen An apparatus for detecting edges of the input signal to signal processing executed on the basis of edge timings |
06/27/2002 | DE10062568A1 Signal detector circuit has compensated and non-compensated delay stages coupled to detection device for detecting differing delay characteristics |
06/26/2002 | EP1217741A1 Low power circuit with slew rate adjustment |
06/26/2002 | EP1217740A2 Adjustable phase shifter |
06/26/2002 | EP1217498A2 Clock with variable frequency control |