Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
04/2002
04/30/2002US6380773 Prescalar using fraction division theory
04/30/2002US6380767 Connection control circuit
04/25/2002WO2002033920A1 Dc-offset compensation
04/25/2002US20020048336 Digital display jitter correction apparatus and method
04/25/2002US20020048335 Phase-adjustment control method and information processing apparatus
04/25/2002US20020047836 Active matrix display device
04/25/2002US20020047739 Modified clock signal generator
04/25/2002US20020047730 Circuit for the demodulation of the logic signal transmitted by analog channels
04/25/2002DE10141070A1 Zeit-Digital-Wandler Time-to-digital converter
04/24/2002EP1199804A2 Phase/frequency comparator
04/24/2002EP1199800A1 Circuit for programming the delay time of a signal path
04/24/2002EP1199799A2 Signal compensator circuit and demodulator circuit
04/24/2002CN1346542A Comparator circuit
04/24/2002CN1346175A Frequency double circuit with detection control unit used for improving frequency doubling preperty
04/24/2002CN1083637C Decoder for trellis encoded signal mixed with NTSC co-channel interference and white noise
04/23/2002US6377633 Apparatus and method for decoding asynchronous data
04/23/2002US6377511 Semiconductor integrated circuit device
04/23/2002US6377108 Low jitter differential amplifier with negative hysteresis
04/23/2002US6377104 Static clock pulse generator and display
04/23/2002US6377103 Symmetric, voltage-controlled CMOS delay cell with closed-loop replica bias
04/23/2002US6377102 Load equalization in digital delay interpolators
04/23/2002US6377101 Variable delay circuit and semiconductor integrated circuit device
04/23/2002US6377100 Semiconductor device
04/23/2002US6377099 Static clock pulse generator, spatial light modulator and display
04/23/2002US6377095 Digital-edge-rate control LVDS driver
04/23/2002US6377094 Arbitrary waveform synthesizer using a free-running ring oscillator
04/23/2002US6377092 Delay locked loop circuit capable of adjusting phase of clock with high precision
04/23/2002US6377085 Precision bias for an transconductor
04/23/2002US6377083 Semiconductor integrated device and methods of detecting and correcting a voltage drop in an integrated circuit
04/23/2002US6377082 Loss-of-signal detector for clock/data recovery circuits
04/23/2002US6377081 Phase detection circuit
04/23/2002US6377077 Clock supply circuit and data transfer circuit
04/18/2002WO2002031980A2 Cyclic phase signal generation from a single clock source using current phase interpolation
04/18/2002US20020046384 Detection of added or missing forwarding data clock signals
04/18/2002US20020044114 Pattern output circuit and pattern output method
04/18/2002US20020044013 Signal compensator circuit and demodulator circuit
04/18/2002US20020044009 Self-bias adjustment circuit
04/18/2002US20020043996 Semiconductor device capable of generating highly precise internal clock
04/18/2002US20020043995 Fast locking phase frequency detector
04/18/2002US20020043671 Semiconductor integrated circuit having circuit for transmitting input signal
04/18/2002DE10143687A1 Taktaktivierungsschaltung zur Verwendung in einer wiederprogrammierbaren Hochgeschwindigkeitsverzögerungsleitung mit einer störimpulsfreien Aktivierungs/Deaktivierungsfunktionalität Clock enable circuit for use in a reprogrammable high-speed delay line with a glitchless enabling / disabling functionality
04/18/2002DE10047183A1 Intermediate digital memory element for transmitting flank signals from an interrupt generator to a CPU without any dead time being caused by the transfer
04/18/2002DE10043730C1 Verfahren und Vorrichtung zur zeitlichen Korrektur eines Datensignals Method and apparatus for time correction of a data signal
04/17/2002EP1025644A4 A master-slave delay locked loop for accurate delay of non-periodic signals
04/17/2002EP0935849A4 Low-impedance cmos output stage and method
04/17/2002EP0778999B1 High speed digital buffer, driver or level shifter circuit
04/17/2002CN2487155Y Photoelectric multiplexing tube weak pulse signal processing circuit
04/17/2002CN1083137C Shift register useful as select line scanner for liquid crystal display
04/16/2002US6373913 Internal clock signal generator including circuit for accurately synchronizing internal clock signal with external clock signal
04/16/2002US6373909 Communications terminal having a receiver and method for removing known interferers from a digitized intermediate frequency signal
04/16/2002US6373342 Jitter reduction circuit
04/16/2002US6373328 Comparator circuit
04/16/2002US6373313 Delay time regulation method and delay time regulation circuit
04/16/2002US6373312 Precision, high speed delay system for providing delayed clock edges with new delay values every clock period
04/16/2002US6373309 Duty cycle compensation circuit of delay locked loop for Rambus DRAM
04/16/2002US6373308 Direct-measured DLL circuit and method
04/16/2002US6373307 Semiconductor integrated circuit
04/16/2002US6373303 Sync signal generating circuit provided in semiconductor integrated circuit
04/16/2002US6373289 Data and strobe repeater having a frequency control unit to re-time the data and reject delay variation in the strobe
04/16/2002US6373288 Method of implementing clock trees in synchronous digital electronic circuits, and a programmable delay buffer stage therefor
04/11/2002US20020042856 Anti-starvation interrupt protocol
04/11/2002US20020041649 Method and apparatus for temporally correcting a data signal
04/11/2002US20020041417 Burst mode optical receiver using multi-stage feedback
04/11/2002US20020041249 Comparator and converter using the same
04/11/2002US20020041204 Variable clock configuration for switched op-amp circuits
04/11/2002US20020041197 Offsetting comparator device and comparator circuit
04/11/2002US20020041195 Clock period sensing circuit
04/10/2002EP1195959A1 Baseline wander correction for MLT3 signals
04/10/2002EP1119901B1 Frequency to frequency de-randomiser circuit
04/10/2002EP1048108A4 A variable delay cell with a self-biasing load
04/10/2002EP0709775B1 Circuit for detecting a fault state in a clock signal for microprocessor electronic devices
04/10/2002CN1344410A Device for writing information onto information carrier
04/10/2002CN1082777C Signal generator and wireless mobile system including same
04/09/2002US6369743 Differential amplifier, comparator, and A/D converter
04/09/2002US6369670 Dynamically adjustable tapped delay line
04/09/2002US6369652 Differential amplifiers with current and resistance compensation elements for balanced output
04/09/2002US6369644 Filter circuit
04/09/2002US6369628 Phase alignment circuit for periodic signals
04/09/2002US6369627 Delay circuit and semiconductor integrated circuit having same
04/09/2002US6369626 Low pass filter for a delay locked loop circuit
04/09/2002US6369624 Programmable phase shift circuitry
04/09/2002US6369527 Vertical blanking circuit and bias clamp boost supply
04/04/2002WO2002027927A2 Comparator programmable for high-speed or low-power operation
04/04/2002US20020039397 Phase comparator circuit
04/04/2002US20020039036 Delay circuit and ring oscillator incorporating the same
04/03/2002EP1193902A2 Signal break detecting circuit
04/03/2002CN1082276C Prescalar circuit
04/02/2002US6366611 Circuit for controlling equalization pulse width
04/02/2002US6366160 Waveshaper for false edge rejection of an input signal
04/02/2002US6366155 Reference voltage generators and methods including supplementary current generation, and integrated circuits including the same
04/02/2002US6366151 Waveform correction circuit
04/02/2002US6366150 Digital delay line
04/02/2002US6366149 Delay circuit having variable slope control and threshold detect
04/02/2002US6366137 Very low-power comparison device
04/02/2002US6366136 Voltage comparator circuit with hysteresis
04/02/2002US6366128 Circuit for producing low-voltage differential signals
04/02/2002US6366125 Digital output circuit
04/02/2002US6366123 Input buffer circuit for low power application
04/02/2002US6366122 Tristate driver for integrated circuit in interconnects
04/02/2002US6366115 Buffer circuit with rising and falling edge propagation delay correction and method