Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
12/2002
12/24/2002US6498512 Clock reshaping
12/19/2002WO2002101727A1 Method and system for determining filter gain and automatic gain control
12/19/2002WO2002101724A1 Method and system for implementing a low complexity spectrum estimation technique for comfort noise generation
12/19/2002WO2002101723A1 Method and system for implementing a gaussian white noise generator for real time speech synthesis applications
12/19/2002WO2002101722A1 Method and system for generating colored comfort noise in the absence of silence insertion description packets
12/19/2002WO2002069132A3 Improved high speed data capture circuit for a digital device
12/19/2002US20020191723 Parallel signal automatic phase adjusting circuit
12/19/2002US20020191719 Differential signal-delaying apparatus, receiver employing the apparatus, and communication system
12/19/2002US20020191094 CCD clock alignment circuit using a frequency locked clock multiplier
12/19/2002US20020190798 Ring oscillator circuit and a delay circuit
12/19/2002US20020190777 Current pulse receiving circuit
12/19/2002US20020190774 Feed-forward approach for timing skew in interleaved and double-sampled circuits
12/19/2002US20020190773 Feed-forward approach for timing skew in interleaved and double-sampled circuits
12/19/2002US20020190772 Method and apparatus for a clock circuit
12/19/2002US20020190760 Arbitrary waveform synthesizer using a free-running ring oscillator
12/19/2002US20020190759 Electrochemically accelerated self-assembly of molecular devices
12/19/2002US20020190283 Power supply control device, semiconductor device and method of driving semiconductor device
12/19/2002DE10200875A1 Einstellschaltung für die Übergangsverzögerung eines gepulsten Signals Adjusting for the transition delay of a pulsed signal
12/18/2002EP1267492A1 Voltage comparing circuit
12/18/2002EP1267491A2 Precision low jitter oscillator circuit
12/18/2002EP1267355A1 One-shot signal generating circuit
12/18/2002EP1266760A2 Printhead, head cartridge having said printhead, printing apparatus using said printhead and printhead element substrate
12/18/2002EP1266453A1 High noise rejection voltage-controlled ring oscillator architecture
12/18/2002EP1212829A4 Method and apparatus for automatically compensating a spread spectrum clock generator
12/18/2002CN1386349A 5-unit receiver utilizing common mode insensitive differential offset comparator
12/18/2002CN1386324A 切换控制电路 Switching control circuit
12/18/2002CN1385967A Quickly-locked double-track digital delay phase-locking circuit
12/18/2002CN1385964A Signal detection circuit, data transmission controller and electronic equipment
12/18/2002CN1385796A Signal receiving circuit, data transmission controller and electronic equipment
12/17/2002US6496845 Low pass filter
12/17/2002US6496552 Timing circuit
12/17/2002US6496548 Apparatus and method for decoding asynchronous data using derivative calculation
12/17/2002US6496134 Frequency spectrum method and frequency spectrum analyzer
12/17/2002US6496126 Digitization apparatus and method using a finite state machine in feedback loop
12/17/2002US6496050 Selective modification of clock pulses
12/17/2002US6496048 System and method for accurate adjustment of discrete integrated circuit delay lines
12/17/2002US6496042 Phase comparator for identifying and returning a non-return-to-zero receiving signal
12/17/2002US6496038 Pulsed circuit topology including a pulsed, domino flip-flop
12/12/2002WO2002099971A1 Semiconductor integrated circuit
12/12/2002WO2002099970A1 Controllable delay circuit for delaying an electric signal
12/12/2002WO2002099619A1 Semiconductor integrated circuit
12/12/2002WO2002076008A3 Apparatus for and method of measuring jitter
12/12/2002US20020186801 Output circuit
12/12/2002US20020186071 Semiconductor integrated circuit device including a substrate bias controller and a current limiting circuit
12/12/2002US20020186064 Delay circuit having low operating environment dependency
12/12/2002US20020186062 Frequency doubler circuit having detect-control unit for improving frequency doubling performance
12/12/2002US20020186060 Complementary signal generation circuit
12/12/2002US20020186052 Fully differential continuous-time current-mode high speed CMOS comparator
12/11/2002EP1265363A2 Adjustable temperature-compensated threshold circuit with trip-points exceeding the given supplies
12/11/2002EP1265361A2 Complementary signal generation circuit
12/11/2002EP1265247A1 A programmable delay line and corresponding memory
12/11/2002EP1265217A2 Operational amplifier circuit, driving circuit and driving method
12/11/2002EP1265216A2 Operational amplifier circuit, driving circuit and driving method
12/11/2002EP1264457A1 Baseband data slicing method and apparatus
12/11/2002EP1166445B1 Pulse clock/signal delay apparatus and method
12/11/2002EP1116087B1 Synchronous polyphase clock distribution system
12/11/2002CN1384607A Low-current clock detector
12/11/2002CN1096050C Remote control system, lighting system and filter
12/10/2002US6493305 Pulse width control circuit
12/10/2002US6492851 Digital phase control circuit
12/10/2002US6492847 Digital driver circuit
12/10/2002US6492836 Receiver immune to slope-reversal noise
12/05/2002WO2002097998A2 Ultra high speed clocked analog latch
12/05/2002WO2002097995A1 Power efficient delay stage for a voltage-controlled oscillator
12/05/2002WO2002097994A1 Differential cmos controlled delay unit
12/05/2002WO2002097987A2 Method and system for managing a pulse width of a signal pulse
12/05/2002WO2002097958A2 Circuit configuration comprising a control loop
12/05/2002WO2002097814A1 High-speed zero phase restart of a multiphase clock
12/05/2002WO2002070789A3 Electrical potential-assisted assembly of molecular devices
12/05/2002WO2002056558A9 Active filter circuit with dynamically modifiable internal gain
12/05/2002US20020184469 Processor with dual-deadtime pulse width modulation generator
12/05/2002US20020181639 Adaptive de-skew clock generation
12/05/2002US20020180720 Operational amplifier circuit, driving circuit and driving method
12/05/2002US20020180717 Operational amplifier circuit, driving circuit, and driving method
12/05/2002US20020180589 Comparator circuits having non-complementary input structures
12/05/2002US20020180547 Efficient pulse amplitude modulation transmit modulation
12/05/2002US20020180505 Pulsed signal transition delay adjusting circuit
12/05/2002US20020180500 Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory
12/05/2002US20020180496 Semiconductor integrated circuit including clock modulation circuit
12/05/2002US20020180492 Comparator with offset voltage
12/05/2002US20020180488 Frequency comparison circuit
12/05/2002US20020180483 Variable voltage data buffers
12/05/2002DE10126925A1 Schaltungsanordnung mit einer Regelschaltung Circuitry with a control circuit
12/05/2002DE10125603A1 Method for automatic suppression of shimmying events sets up a period of single consecutive time slices to receive/count the events and to determine a criterion for recognizing a cluster of time slices with multiple received events.
12/04/2002EP1263161A1 Synchronisation circuit
12/04/2002EP1263139A2 Glitch-free multiplexer
12/04/2002EP1262016A2 Fractional-n phase locked loop
12/03/2002US6490224 Delay-locked loop with binary-coupled capacitor
12/03/2002US6490207 Delay-locked loop with binary-coupled capacitor
12/03/2002US6489826 Clock generator with programmable non-overlapping clock-edge capability
12/03/2002US6489824 Timing-control circuit device and clock distribution system
12/03/2002US6489823 Semiconductor device capable of generating highly precise internal clock
12/03/2002US6489822 Delay locked loop with delay control unit for noise elimination
12/03/2002US6489820 Method and apparatus for distributing clocks
12/03/2002US6489818 Power adaptive frequency divider
12/03/2002US6489815 Low-noise buffer circuit that suppresses current variation
12/03/2002US6489813 Low power comparator comparing differential signals
11/2002
11/28/2002WO2002095943A2 Programmable self-calibrating vernier and method
11/28/2002WO2002037780A3 Line driver for supplying symmetrical output signals to a two-wire communication bus
11/28/2002US20020178392 Method and apparatus for generating a second signal having a clock based on a second clock from a first signal having a first clock