| Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996) |
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| 05/30/2006 | US7053692 Powergate control using boosted and negative voltages |
| 05/30/2006 | US7053686 Data strobe circuit using clock signal |
| 05/30/2006 | US7053680 Complement reset buffer |
| 05/30/2006 | US7053679 Output driver for controlling slew rate in a semiconductor device |
| 05/30/2006 | US7053677 Input/output device having linearized output response |
| 05/30/2006 | US7053670 Semiconductor integrated circuit device and semiconductor integrated circuit |
| 05/30/2006 | US7053665 Circuits and methods for high-capacity asynchronous pipeline processing |
| 05/30/2006 | US7053664 Null value propagation for FAST14 logic |
| 05/30/2006 | US7053663 Dynamic gate with conditional keeper for soft error rate reduction |
| 05/30/2006 | US7053662 Method and circuit for high speed transmission gate logic |
| 05/30/2006 | US7053661 Impedance-matched output driver circuits having enhanced predriver control |
| 05/30/2006 | US7053660 Output buffer circuit and control method therefor |
| 05/30/2006 | US7053659 CMOS high speed level shifting differential receiver |
| 05/30/2006 | US7053658 Apparatus for circuit with keeper |
| 05/30/2006 | US7053657 Dynamically biased wide swing level shifting circuit for high speed voltage protection input/outputs |
| 05/30/2006 | US7053656 Level shifter utilizing input controlled zero threshold blocking transistors |
| 05/30/2006 | US7053655 Multi-level driver stage |
| 05/30/2006 | US7053654 PLD lookup table including transistors of more than one oxide thickness |
| 05/30/2006 | US7053653 Inter-tile buffer system for a field programmable gate array |
| 05/30/2006 | US7053652 Static memory cell circuit with single bit line and set/reset write function |
| 05/30/2006 | US7053651 Low power CMOS switching |
| 05/30/2006 | US7053650 Communication device for a logic circuit |
| 05/26/2006 | WO2006054675A1 Vehicle drive system and vehicle comprising it |
| 05/25/2006 | US20060109031 Complementary pass-transistor logic circuit and semiconductor device |
| 05/25/2006 | US20060109030 Single-supply voltage translator input having low supply current |
| 05/25/2006 | US20060109029 Logic circuit |
| 05/25/2006 | US20060109028 Single-stage and multi-stage low power interconnect architectures |
| 05/25/2006 | US20060109027 Programmable logic cell |
| 05/25/2006 | US20060109026 Line reflection reduction with energy-recovery driver |
| 05/24/2006 | EP1659693A2 Coarse-Grained Look-Up Table Integrated Circuit |
| 05/24/2006 | EP1659692A1 Method and apparatus for limiting power amplifier voltage excursions |
| 05/24/2006 | EP1659486A1 Data processing device |
| 05/24/2006 | EP1423951B1 Differential line driver with on-chip termination |
| 05/24/2006 | EP1364436B1 Method and apparatus for diagnosing failures in an integrated circuit using design-for-debug (dfd) techniques |
| 05/24/2006 | DE69831900T2 Programmier-Modus-Auswahl mit JTAG Schaltungen Programming mode selection with JTAG circuits |
| 05/24/2006 | DE102004054546A1 Treiberschaltung Driver circuit |
| 05/24/2006 | DE102004002411B4 Treiberschaltung, insbesondere mit Pegelumsetzfunktion Driver circuit, particularly with Pegelumsetzfunktion |
| 05/24/2006 | CN1778081A Transmitter circuit, receiver circuit, interface circuit, and electronic device |
| 05/24/2006 | CN1778046A Receiver circuit, interface circuit and electronic device |
| 05/24/2006 | CN1778043A Integrated digital circuit comprising a non-volatile storage element |
| 05/24/2006 | CN1777031A Bootstrap circuit and driving method thereof |
| 05/24/2006 | CN1777030A Input Buffer circuit for reducing power consumption |
| 05/24/2006 | CN1777029A Input buffer circuit for stabilizing logic converting point |
| 05/24/2006 | CN1776691A Pipelined buffer |
| 05/24/2006 | CN1257611C 差动比较电路系统 Differential comparator circuit system |
| 05/23/2006 | US7051294 Cold clock power reduction |
| 05/23/2006 | US7051129 Memory device having programmable drive strength setting |
| 05/23/2006 | US7050329 Magnetic spin based memory with inductive write lines |
| 05/23/2006 | US7050036 Shift register with a built in level shifter |
| 05/23/2006 | US7049862 Semiconductor device |
| 05/23/2006 | US7049861 Reduced current input buffer circuit |
| 05/23/2006 | US7049851 Decoder circuit |
| 05/23/2006 | US7049850 Semiconductor device with a voltage detecting device to prevent shoot-through phenomenon in first and second complementary switching devices |
| 05/23/2006 | US7049849 Signal transmission circuits that use multiple input signals to generate a respective transmit signal |
| 05/23/2006 | US7049848 Linear buffer |
| 05/23/2006 | US7049847 Semiconductor device |
| 05/23/2006 | US7049846 Clock tree network in a field programmable gate array |
| 05/23/2006 | US7049845 Programmable delay line using configurable logic block |
| 05/23/2006 | US7049797 Semiconductor integrated circuit device |
| 05/18/2006 | WO2006051485A1 Adiabatic cmos design |
| 05/18/2006 | WO2006003368A3 Improved c-element and logic reduction and completion detection circuits |
| 05/18/2006 | WO2002041323A8 Circuit arrangement |
| 05/18/2006 | US20060103431 Dynamic logic circuit incorporating reduced leakage state-retaining devices |
| 05/18/2006 | US20060103430 Leakage-tolerant dynamic wide-nor circuit structure |
| 05/18/2006 | US20060103429 Bootstrap circuit and driving method thereof |
| 05/18/2006 | US20060103428 Semiconductor integrated circuit |
| 05/18/2006 | US20060103427 Overvoltage tolerant input buffer |
| 05/18/2006 | US20060103426 Compensation circuits for unequal input/output common mode voltages |
| 05/18/2006 | US20060103425 Output buffer stage |
| 05/18/2006 | US20060103424 Low-power low-voltage multi-level variable-resistor line driver |
| 05/18/2006 | US20060103423 Buffer circuit |
| 05/18/2006 | US20060103422 Low leakage, source modulated, differential output level shifter |
| 05/18/2006 | US20060103421 System-in-package type semiconductor device |
| 05/18/2006 | US20060103420 Switch block and corresponding switch matrix, in particular for FPGA architectures |
| 05/18/2006 | US20060103419 Programmable logic device including multipliers and configurations thereof to reduce resource utilization |
| 05/18/2006 | US20060103418 Methods and systems for rise-time improvements in differential signal outputs |
| 05/18/2006 | US20060102934 Semiconductor integrated circuit device |
| 05/18/2006 | DE102005011343A1 Sensorsteuerung Sensor control |
| 05/18/2006 | DE102004056738B3 Programmierbare Logikzelle für eine programmierbare Logikanordnung, arithmetische Einheit und digitale Schaltungsanordnung The programmable logic cell for a programmable logic array, arithmetic unit and digital circuitry |
| 05/18/2006 | DE102004053335A1 Electronic component e.g. field programmable gate array component, has electronic circuit with memory units and module generating start signals, where units characterize specification language module and have start signal evaluation unit |
| 05/17/2006 | EP1657615A2 Semiconductor device with leakage current compensating circuit |
| 05/17/2006 | EP1656762A2 Method and apparatus for providing security for debug circuitry |
| 05/17/2006 | CN1774770A Magnetic logic system |
| 05/17/2006 | CN1774768A Low-power high-performance memory circuit and related methods |
| 05/17/2006 | CN1773861A Driver circuit |
| 05/17/2006 | CN1773857A Method and apparatus for generating non-skewed complementary signals through interpolation |
| 05/17/2006 | CN1256807C Differential data transmitter and differential date receiving and transmitting device |
| 05/16/2006 | US7047450 Storage system and a method for diagnosing failure of the storage system |
| 05/16/2006 | US7046493 Input/output buffer protection circuit |
| 05/16/2006 | US7046068 CMOS-based receiver for communications applications |
| 05/16/2006 | US7046067 Thin-oxide devices for high voltage I/O drivers |
| 05/16/2006 | US7046063 Interface circuit for coupling between logic circuit domains |
| 05/16/2006 | US7046062 Method and device for symmetrical slew rate calibration |
| 05/16/2006 | US7046041 Structures and methods of implementing a pass gate multiplexer with pseudo-differential input signals |
| 05/16/2006 | US7046040 Bootstrap driver |
| 05/16/2006 | US7046039 Class AB analog inverter |
| 05/16/2006 | US7046038 Upward and downward pulse stretcher circuits and modules |
| 05/16/2006 | US7046037 Differential input buffers with elevated power supplies |
| 05/16/2006 | US7046036 Output buffer with low-voltage devices to driver high-voltage signals for PCI-X applications |
| 05/16/2006 | US7046035 Programmable driver for an I/O pin of an integrated circuit |