Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
06/2008
06/19/2008US20080143387 Software programmable multiple function integrated circuit module
06/19/2008US20080143386 Concept for interfacing a first circuit requiring a first supply voltage and a second supply circuit requiring a second supply voltage
06/19/2008US20080143385 High-speed differential logic to CMOS translator architecture with low data-dependent jitter and duty cycle distortion
06/19/2008US20080143384 Printed circuit unit based on organic transistor
06/19/2008US20080143383 Using A Delay Clock To Optimize The Timing Margin Of Sequential Logic
06/19/2008US20080143382 Programming Matrix
06/19/2008US20080143381 Functional Cells for Automated I/O Timing Characterization of An Integrated Circuit
06/19/2008US20080143380 Low static current drain logic circuit
06/19/2008US20080143379 Reprogrammable circuit board with alignment-insensitive support for multiple component contact types
06/19/2008US20080143378 Apparatus and methods for communicating with programmable logic devices
06/19/2008US20080143377 Impedance calibration circuit and semiconductor device including the same
06/19/2008US20080143375 Method for reducing cross-talk induced source synchronous bus clock jitter
06/19/2008US20080143374 ANTI-SEE PROTECTION TECHNIQUES FOR HIGH-SPEED ICs WITH A CURRENT-SWITCHING ARCHITECTURE
06/19/2008US20080143373 Using electrically programmable fuses to hide architecture, prevent reverse engineering, and make a device inoperable
06/18/2008EP1933463A1 Reconfigurable semiconductor integrated circuit and its processing allocation method
06/18/2008EP1933025A1 A system and method for controlling resistive loads with ground return connected to the engine ground
06/18/2008EP1932237A1 Low-voltage down converter
06/18/2008CN101202543A Magnetic materials logic circuit and method of making the same
06/18/2008CN101202540A Oscillator and design method thereof
06/18/2008CN101202527A High precision velocity simulate given circuit
06/17/2008US7389535 Password management
06/17/2008US7389488 Method of finding driving strength and computer accessible record medium to store program thereof
06/17/2008US7389487 Dedicated interface architecture for a hybrid integrated circuit
06/17/2008US7389097 Receiver, transceiver circuit, signal transmission method, and signal transmission system
06/17/2008US7388411 Semiconductor integrated circuit device and semiconductor integrated circuit system
06/17/2008US7388406 CML circuit devices having improved headroom
06/17/2008US7388405 Signal transmission circuit
06/17/2008US7388404 Driver circuit that limits the voltage of a wave front launched onto a transmission line
06/17/2008US7388403 Two-stage level shifting module
06/17/2008US7388402 Level shift circuit
06/17/2008US7388401 Input/output circuit device
06/17/2008US7388400 Semiconductor integrated circuits with power reduction mechanism
06/17/2008US7388399 Domino logic with variable threshold voltage keeper
06/17/2008US7388238 Semiconductor integrated circuit device with reduced leakage current
06/12/2008WO2008069129A1 Drive circuit and semiconductor device using the same
06/12/2008US20080141349 System and method for computer security
06/12/2008US20080141186 Semiconductor integrated circuit and design method for semiconductor integrated circuit
06/12/2008US20080137468 Circuit Having Relaxed Setup Time Via Reciprocal Clock and Data Gating
06/12/2008US20080137016 Fanout line structure and flat display device including fanout line structure
06/12/2008US20080136508 Semiconductor integrated circuit device
06/12/2008US20080136483 Latch Circuit
06/12/2008US20080136455 Electronic Device and Method and Performing Logic Functions
06/12/2008US20080136454 Ballistic deflection transistor and logic circuits based on same
06/12/2008US20080136453 Digital temperature detecting system and method
06/12/2008US20080136452 True/Complement Generator Having Relaxed Setup Time Via Self-Resetting Circuitry
06/12/2008US20080136451 Method of maintaining Input and/or Output Configuration and Data States During and When Coming Out of a Low Power Mode
06/12/2008US20080136450 Maintaining Input and/or Output Configuration and Data State During and When Coming Out of a Low Power Mode
06/12/2008US20080136449 Dedicated crossbar and barrel shifter block on programmable logic resources
06/12/2008US20080136448 State machine and system and method of implementing a state machine
06/12/2008US20080136447 Method and apparatus for implementing complex logic within a memory array
06/12/2008US20080136446 Block level routing architecture in a field programmable gate array
06/12/2008US20080136445 Synchronous elastic designs with early evaluation
06/12/2008US20080136444 Device for a line termination of two-wire lines
06/12/2008US20080136443 Input Termination For Delay Locked Loop Feedback With Impedance Matching
06/12/2008US20080136442 Signal isolator using micro-transformers
06/12/2008US20080136441 Semiconductor integrated circuit and measuring method of terminator resistor in the semiconductor integrated circuit
06/11/2008EP1929631A1 Logic modules for semiconductor integrated circuits
06/11/2008EP1929468A1 Method of generating strong spin waves and spin devices for ultra-high speed information processing using spin waves
06/11/2008EP1929390A1 Semiconductor integrated circuit having current leakage reduction scheme
06/11/2008EP1849084B1 Bus arbitration controller with reduced energy consumption
06/11/2008CN101197569A Circuit built in chip for initializing its operation mode and method thereof
06/11/2008CN101197561A Flip-flop circuit with multiple configurations
06/11/2008CN100394512C Rrogrammable switch and integrate circuit
06/11/2008CN100394356C Semiconductor device
06/10/2008US7386828 SAT-based technology mapping framework
06/10/2008US7386812 Logic basic cell and logic basic cell arrangement
06/10/2008US7386741 Method and apparatus for selectively assigning circuit data to a plurality of programmable logic circuits for maintaining each programmable logic circuit within an operation range at a minimum voltage
06/10/2008US7385969 Cross-point switch fabric and switch fabric slice
06/10/2008US7385863 Semiconductor memory device
06/10/2008US7385426 Low current offset integrator with signal independent low input capacitance buffer circuit
06/10/2008US7385425 Printed circuit unit based on organic transistor
06/10/2008US7385424 High-speed differential receiver
06/10/2008US7385423 Low-power low-voltage buffer with half-latch
06/10/2008US7385422 Tri-state output logic with zero quiescent current by one input control
06/10/2008US7385421 Block symmetrization in a field programmable gate array
06/10/2008US7385420 Repeatable block producing a non-uniform routing architecture in a field programmable gate array having segmented tracks
06/10/2008US7385419 Dedicated input/output first in/first out module for a field programmable gate array
06/10/2008US7385418 Non-volatile memory architecture for programmable-logic-based system on a chip
06/10/2008US7385417 Dual slice architectures for programmable logic devices
06/10/2008US7385416 Circuits and methods of implementing flip-flops in dual-output lookup tables
06/10/2008US7385414 Impedance controllable ouput drive circuit in semiconductor device and impedance control method therefor
06/10/2008US7385312 Method and apparatus for mode selection for high voltage integrated circuits
06/05/2008WO2008065669A2 Electrical device for performing logic functions
06/05/2008WO2008065515A2 Control method for fast and slow data transmission for serial interface
06/05/2008WO2008064844A1 Integrated driver circuit for an lin bus
06/05/2008WO2008008271A3 Successive approximation analog to digital converter
06/05/2008US20080134126 Data processing in digital systems
06/05/2008US20080129651 Memory Circuit For Display Panel Driving and Driving Method Thereof
06/05/2008US20080129342 Configurable delay chain with stacked inverter delay elements
06/05/2008US20080129341 Semiconductor apparatus
06/05/2008US20080129340 Logic circuits with electric field relaxation transistors and semiconductor devices having the same
06/05/2008US20080129339 Level Shift Circuit with Voltage Pulling
06/05/2008US20080129338 High-speed asynchronous digital signal level conversion circuit
06/05/2008US20080129337 Method and apparatus for performing shifting in an integrated circuit
06/05/2008US20080129336 Via programmable gate array with offset direct connections
06/05/2008US20080129335 Configurable IC with interconnect circuits that have select lines driven by user signals
06/05/2008US20080129334 Versatile multiplexer-structures in programmable logic using serial chaining and novel selection schemes
06/05/2008US20080129333 Configurable Integrated Circuit with Built-in Turns
06/05/2008US20080129332 On-chip source termination in communication systems
06/05/2008US20080129331 System for transmission line termination by signal cancellation
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