Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
Patents for H03K 19 - Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits (41,996)
12/2008
12/24/2008EP2005590A1 Method and system for a signal driver using capacitive feedback
12/24/2008EP2005588A2 Radiation hardened differential output buffer
12/24/2008EP1535394B1 Loosely-biased heterogeneous reconfigurable arrays
12/24/2008CN101329912A Semiconductor device having transistor and capacitor of SOI structure and storing data in nonvolatile manner
12/24/2008CN101329852A Common voltage drive circuit of LCD
12/24/2008CN100446421C Re-programmable logic array
12/24/2008CN100446419C Semiconductor elements
12/24/2008CN100446251C Rc-timer scheme
12/23/2008US7468627 Multiple circuit blocks with interblock control and power conservation
12/23/2008US7468626 Multiple circuit blocks with interblock control and power conservation
12/23/2008US7468617 Electrostatic discharge (ESD) protection device for use with multiple I/O standards
12/23/2008US7468616 Circuit for and method of generating a delay in an input/output port of an integrated circuit device
12/23/2008US7468615 Voltage level shifter
12/23/2008US7468613 Methods and apparatus for control and configuration of programmable logic devices
12/18/2008WO2008153971A1 Method and apparatus for esd protection
12/18/2008WO2008152697A1 Configuration device
12/18/2008WO2008151842A1 Logic circuit on the basis of nitrides of main group iii elements
12/18/2008WO2008151429A1 Anti-fuse memory cell
12/18/2008WO2007149532A3 Compiler system, method and software for a resilient integrated circuit architecture
12/18/2008WO2007149495A3 Program binding system, method and software for a resilient integrated circuit architecture
12/18/2008US20080310246 Programmable pulsewidth and delay generating circuit for integrated circuits
12/18/2008US20080309395 Systems and Methods for Level Shifting using AC Coupling
12/18/2008US20080309393 Clock-generator architecture for a programmable-logic-based system on a chip
12/18/2008US20080309374 Semiconductor integrated circuit, layout design method of semiconductor integrated circuit, and layout program product for same
12/18/2008US20080309373 Integrated circuit device and electronic instrument
12/18/2008US20080309372 Semiconductor memory device
12/18/2008US20080309371 Face-to-face bonded i/o circuit die and functional logic circuit die system
12/18/2008US20080309370 Reprogrammable Integrated Circuit
12/18/2008US20080309369 Semiconductor integrated circuits with power reduction mechanism
12/18/2008US20080309367 Semiconductor integrated device
12/18/2008DE10085097B4 Verfahren und Einrichtung zum Steuern kompensierter Puffer Method and apparatus for controlling compensated buffer
12/17/2008CN101326720A Dynamic constant folding of a circuit
12/17/2008CN101326719A Method of producing and operating a low power junction field effect transistor
12/17/2008CN101325415A On-line programming apparatus for programmable logic device
12/17/2008CN101325414A Input/output circuit and input control circuit
12/17/2008CN101325413A Switching circuit for power supply
12/17/2008CN101325362A Drive circuit without short circuit loss for CMOS buffer
12/17/2008CN100444523C Dual-voltage three-state buffer circuit
12/16/2008US7467341 Boundary scan controller, semiconductor apparatus, semiconductor-circuit-chip identification method for semiconductor apparatus, and semiconductor-circuit-chip control method for semiconductor apparatus
12/16/2008US7467175 Programmable logic device with pipelined DSP slices
12/16/2008US7467124 Arrangement of configurable logic blocks
12/16/2008US7466312 Level shifter circuit and method for controlling voltage levels of clock signal and inverted clock signal for driving gate lines of amorphous silicon gate-thin film transistor liquid crystal display
12/16/2008US7466191 Self reverse bias low-power high-performance storage circuitry and related methods
12/16/2008US7466165 Transmission gate multiplexer
12/16/2008US7466164 Method and apparatus for a configurable low power high fan-in multiplexer
12/16/2008US7466163 Look-up table structure with embedded carry logic
12/11/2008WO2008150889A1 A method for automatic clock gating to save power
12/11/2008WO2008150794A1 Adjustable input receiver for low power high speed interface
12/11/2008WO2008150435A1 Methods and apparatuses for designing multiplexers
12/11/2008WO2008149480A1 Receiver circuit and data transmission system
12/11/2008WO2008148197A1 Dynamic impedance control for input/output buffers
12/11/2008WO2008131143A3 Dynamically configurable and re-configurable data path
12/11/2008WO2008084363A3 Circuit comprising a matrix of programmable logic cells
12/11/2008WO2008071675A3 A switching circuit
12/11/2008US20080307292 Method and Apparatus for Digit-Serial Communications for Iterative Digital Processing Algorithms
12/11/2008US20080304334 Synchronous semiconductor memory device having on-die termination circuit and on-die termination method
12/11/2008US20080303554 Structure for a configurable low power high fan-in multiplexer
12/11/2008US20080303553 Method and apparatus for a configurable low power high fan-in multiplexer
12/11/2008US20080303552 Clock Distribution Network Architecture for Resonant-Clocked Systems
12/11/2008US20080303551 Semiconductor device
12/11/2008US20080303550 Integrated circuit with plural level shifters
12/11/2008US20080303549 Data transmitting method and electronic device using the same
12/11/2008US20080303548 Semiconductor device
12/11/2008US20080303547 Programmable system on a chip for temperature monitoring and control
12/11/2008US20080303545 Low Power and Low Noise Differential Input Circuit
12/11/2008US20080303544 Delay measuring device and semiconductor device
12/11/2008CA2688277A1 Dynamic impedance control for input/output buffers
12/11/2008CA2686967A1 Adjustable input receiver for low power high speed interface
12/10/2008EP2001133A2 A programmable logic device having complex logic blocks with improved logic cell functionality
12/10/2008EP2001132A1 Circuit and method for driving light emitting diodes
12/10/2008EP1999850A1 Circuit arrangement with switchable functionality and electronic component
12/10/2008EP1999849A2 Electronic device and integrated circuit
12/10/2008CN101320969A Two-segment type electric voltage displacement module
12/10/2008CN101320968A Self-adapting circuit and its processing method
12/10/2008CN101320729A Semiconductor integrated circuit
12/10/2008CN100442663C Turn-on bus transmitter with controlled slew rate
12/10/2008CN100442344C Driver circuit
12/10/2008CN100442193C Semiconductor device
12/09/2008US7464018 Stalling CPU pipeline to prevent corruption in trace while maintaining coherency with asynchronous events
12/09/2008US7463500 Monopolar DC to bipolar DC to AC converter
12/09/2008US7463236 Driver circuit
12/09/2008US7463068 Apparatus and method for over-voltage, under-voltage and over-current stress protection for transceiver input and output circuitry
12/09/2008US7463067 Switch block for FPGA architectures
12/09/2008US7463066 Rail-to-rail source followers
12/09/2008US7463065 Low power single-rail-input voltage level shifter
12/09/2008US7463064 Level shifter having extended input level
12/09/2008US7463063 Semiconductor device
12/09/2008US7463062 Structured integrated circuit device
12/09/2008US7463061 Apparatus and method for reducing leakage of unused buffers in an integrated circuit
12/09/2008US7463060 Programmable logic device and method of testing
12/09/2008US7463059 Alterable application specific integrated circuit (ASIC)
12/09/2008US7463058 Programmable array logic circuit employing non-volatile ferromagnetic memory cells
12/09/2008US7463057 Integrated circuits with adjustable memory element power supplies
12/09/2008US7463056 Writeable shift register lookup table in FPGA with SRAM memory cells in lookup table reprogrammed by writing after initial configuration
12/09/2008US7463055 Switch block and corresponding switch matrix, in particular for FPGA architectures
12/09/2008US7463054 Data bus charge-sharing technique for integrated circuit devices
12/09/2008US7463053 Semiconductor memory device for internally controlling strength of output driver
12/09/2008US7463052 Method and circuit for off chip driver control, and memory device using same
12/09/2008US7463051 Output buffer
12/04/2008WO2008147950A2 Low on resistance cmos transistor for integrated circuit applications
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