Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
10/2008
10/14/2008US7436032 Semiconductor integrated circuit comprising read only memory, semiconductor device comprising the semiconductor integrated circuit, and manufacturing method of the semiconductor integrated circuit
10/14/2008US7436031 Device for implementing an inverter having a reduced size
10/14/2008US7436030 Strained MOSFETs on separated silicon layers
10/14/2008US7436029 High performance CMOS device structures and method of manufacture
10/14/2008US7436028 One-time programmable read only memory and operating method thereof
10/14/2008US7436027 Semiconductor device and fabrication method for the same
10/14/2008US7436026 Semiconductor device comprising a superlattice channel vertically stepped above source and drain regions
10/14/2008US7436025 Termination structures for super junction devices
10/14/2008US7436024 Semiconductor device and method of manufacturing the same
10/14/2008US7436023 High blocking semiconductor component comprising a drift section
10/14/2008US7436022 Enhancing Schottky breakdown voltage (BV) without affecting an integrated MOSFET-Schottky device layout
10/14/2008US7436021 Dense trench MOSFET with decreased etch sensitivity to deposition and etch processing
10/14/2008US7436020 Flash memory with metal-insulator-metal tunneling program and erase
10/14/2008US7436019 Non-volatile memory cells shaped to increase coupling to word lines
10/14/2008US7436017 Semiconductor integrated circuit using a selective disposable spacer
10/14/2008US7436014 Method of fabricating storage capacitor in semiconductor memory device, and storage capacitor structure
10/14/2008US7436009 Via structures and trench structures and dual damascene structures
10/14/2008US7436005 Process for fabricating a heterostructure-channel insulated-gate field-effect transistor, and the corresponding transistor
10/14/2008US7436003 Vertical thyristor for ESD protection and a method of fabricating a vertical thyristor for ESD protection
10/14/2008US7435994 Semiconductor device and method for fabricating the same
10/14/2008US7435992 Active matrix type organic electroluminescent display device and method of manufacturing the same
10/14/2008US7435989 Semiconductor device with layer containing polysiloxane compound
10/14/2008US7435988 Semiconductor device including a MOSFET having a band-engineered superlattice with a semiconductor cap layer providing a channel
10/14/2008US7435669 Method of fabricating transistor in semiconductor device
10/14/2008US7435668 Method for doping impurities, and for producing a semiconductor device and applied electronic apparatus using a solution containing impurity ions
10/14/2008US7435667 Method of controlling polysilicon crystallization
10/14/2008US7435656 Semiconductor device of transistor structure having strained semiconductor layer
10/14/2008US7435655 Semiconductor device and method for manufacturing the same
10/14/2008US7435653 Methods for forming a wrap-around gate field effect transistor
10/14/2008US7435650 Process for manufacturing trench MIS device having implanted drain-drift region and thick bottom oxide
10/14/2008US7435643 Fabrication method of a dynamic random access memory
10/14/2008US7435637 Quantum wire gate device and method of making same
10/14/2008US7435617 Method of fabricating an optoelectronic device having a bulk heterojunction
10/14/2008CA2449309C Cmos circuit with analog and digital portions for transmitting over a communication network
10/09/2008WO2008121991A1 Self-aligned trench mosfet and method of manufacture
10/09/2008WO2008121980A1 N-face high electron mobility transistors with low buffer leakage and low parasitic resistance
10/09/2008WO2008121855A1 Methods of forming improved epi fill on narrow isolation bounded source/drain regions and structures formed thereby
10/09/2008WO2008121784A1 Adhesives with mechanical tunable adhesion
10/09/2008WO2008121714A1 Mechanism for forming a remote delta doping layer of a quantum well structure
10/09/2008WO2008121383A2 Curled semiconductor transistor
10/09/2008WO2008121326A2 An soi transistor having drain and source regions of reduced length and a stressed dielectric material adjacent thereto
10/09/2008WO2008121038A1 A power semiconductor arrangement and a semiconductor valve provided therewith
10/09/2008WO2008120568A1 Semiconductor integrated circuit device
10/09/2008WO2008120482A1 Magnetic random access memory
10/09/2008WO2008120467A1 Method for manufacturing semiconductor device
10/09/2008WO2008120418A1 Semiconductor device, and its manufacturing method
10/09/2008WO2008120384A1 Semiconductor device, and its manufacturing method
10/09/2008WO2008120378A1 Semiconductor device and its manufacturing method
10/09/2008WO2008120335A1 Semiconductor device, and its manufacturing method
10/09/2008WO2008120092A1 Doped substrate to be heated
10/09/2008WO2008083145A3 Control of standoff height between packages with a solder-embedded tape
10/09/2008WO2008061166B1 Multi-state memory and multi-functional devices comprising magnetoplastic or magnetoelastic materials
10/09/2008WO2008028181A3 High operation temperature split-off band infrared detectors
10/09/2008WO2007149835A3 Photovoltaic cells
10/09/2008WO2007112393A3 Semiconductor device with solderable loop contacts
10/09/2008WO2007108932A3 Technique for preparing precursor films and compound layers for thin film solar cell fabrication and apparatus corresponding thereto
10/09/2008US20080248651 Method for manufacturing semiconductor device and semiconductor device
10/09/2008US20080248635 Polycrystalline SiGe Junctions for Advanced Devices
10/09/2008US20080248634 Enhancement mode iii-nitride fet
10/09/2008US20080248624 Method of making integrated circuit (ic) including at least one storage cell
10/09/2008US20080248620 Gated semiconductor device and method of fabricating same
10/09/2008US20080248616 Integration of strained Ge into advanced CMOS technology
10/09/2008US20080248605 Method of forming a pressure switch thin film device
10/09/2008US20080248324 Piezoelectric element and film formation method for crystalline ceramic
10/09/2008US20080248304 Growth of single crystal nanowires
10/09/2008US20080248270 Substrate for thin chip packagings
10/09/2008US20080248251 Semiconductor substrates having useful and transfer layers
10/09/2008US20080247935 Compound Semiconductor Substrate
10/09/2008US20080247908 Sensor Chip for a Biosensor
10/09/2008US20080247226 Memory devices having electrodes comprising nanowires, systems including same and methods of forming same
10/09/2008US20080246704 Display device
10/09/2008US20080246368 Integration of dissimilar materials for advanced multfunctional devices
10/09/2008US20080246152 Semiconductor device with bonding pad
10/09/2008US20080246122 Positive-intrinsic-negative (pin)/negative-intrinsic-positive (nip) diode
10/09/2008US20080246121 Method of fabricating a device with a concentration gradient and the corresponding device
10/09/2008US20080246120 REDUCTION OF SILICIDE FORMATION TEMPERATURE ON SiGe CONTAINING SUBSTRATES
10/09/2008US20080246119 Large tuning range junction varactor
10/09/2008US20080246118 Method for realizing a contact of an integrated well in a semiconductor substrate, in particular for a base terminal of a bipolar transistor, with enhancement of the transistor performances
10/09/2008US20080246117 Surface patterned topography feature suitable for planarization
10/09/2008US20080246116 Symmetrical programmable crossbar structure
10/09/2008US20080246115 Robust esd cell
10/09/2008US20080246114 Integrated passive device with a high resistivity substrate and method for forming the same
10/09/2008US20080246113 Semiconductor device including redistribution line structure and method of fabricating the same
10/09/2008US20080246111 Semiconductor device and method of fabricating the same
10/09/2008US20080246104 High Capacity Low Cost Multi-State Magnetic Memory
10/09/2008US20080246102 Semiconductor device and method for manufacturing the same
10/09/2008US20080246101 Method of poly-silicon grain structure formation
10/09/2008US20080246100 High-k dielectric film, method of forming the same and related semiconductor device
10/09/2008US20080246099 Low temperature poly oxide processes for high-k/metal gate flow
10/09/2008US20080246098 Split-channel antifuse array architecture
10/09/2008US20080246096 Semiconductor device including schottky barrier diode and method of manufacturing the same
10/09/2008US20080246095 Ambipolar transistor design
10/09/2008US20080246092 Semiconductor device structure with strain layer and method of fabricating the semiconductor device structure
10/09/2008US20080246090 Self-aligned planar double-gate transistor structure
10/09/2008US20080246089 Method of manufacturing thin film transistor
10/09/2008US20080246088 Self-Aligned Lightly Doped Drain Recessed-Gate Thin-Film Transistor
10/09/2008US20080246087 Mos transistor for reducing short-channel effects and its production
10/09/2008US20080246085 Power semiconductor device
10/09/2008US20080246084 Power semiconductor device and method for producing the same
10/09/2008US20080246083 Recessed drift region for HVMOS breakdown improvement
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