Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
09/2008
09/25/2008WO2008116040A1 Termination and contact structures for a high voltage gan-based heterojunction transistor
09/25/2008WO2008116038A2 Cascode circuit employing a depletion-mode, gan-based fet
09/25/2008WO2008115937A1 Doped wge to form dual metal gates
09/25/2008WO2008115266A2 Growth of metallic nanodots using specific precursors
09/25/2008WO2008115191A2 Nanowire on non-single crystal substrate for optoelectronic applications
09/25/2008WO2008114838A1 METHOD FOR FORMING OHMIC ELECTRODE ON P-TYPE 4H-Sic SUBSTRATE
09/25/2008WO2008114760A1 Piezo-diode cantilever mems
09/25/2008WO2008114599A1 Active matrix substrate
09/25/2008WO2008114598A1 Active matrix substrate
09/25/2008WO2008114588A1 Sputtering target, oxide semiconductor film and semiconductor device
09/25/2008WO2008114564A1 Thin film transistor and method for manufacturing thin film transistor
09/25/2008WO2008114412A1 Semiconductor device and method for fabricating the same
09/25/2008WO2008114336A1 Semiconductor element
09/25/2008WO2008083469A8 Light emitting devices with a zinc oxide thin film structure
09/25/2008WO2008011459A3 Power semiconductor devices having integrated inductor
09/25/2008WO2007092529A8 Techniques for depositing metallic films using ion implantation surface modification for catalysis of electroless deposition
09/25/2008WO2006122058A3 Transient blocking apparatus with electrostatic discharge protection
09/25/2008WO2006121461A3 Light emitters using nanotubes and methods of making same
09/25/2008US20080233764 Formation of Gate Insulation Film
09/25/2008US20080233741 Bulk-Isolated PN Diode and Method of Forming a Bulk-Isolated PN Diode
09/25/2008US20080233701 Methods of Forming Integrated Circuit Devices Including a Depletion Barrier Layer at Source/Drain Regions
09/25/2008US20080233698 Semiconductor device and method of manufacturing the same
09/25/2008US20080233696 Semiconductor device and method for fabricating the same
09/25/2008US20080233665 Method of manufacturing a semiconductor device
09/25/2008US20080233487 lithography focus and/or energy using a specially-designed optical critical dimension pattern. A wafer comprising a plurality of photomasks is received. Critical dimension, line-end shortening, and side wall angle of the plurality of photomasks are measured using an integrated metrology equipment.
09/25/2008US20080231779 Display substrate and display apparatus having the same
09/25/2008US20080231617 Display Device
09/25/2008US20080231584 Active matrix type display device
09/25/2008US20080230872 Bipolar transistor and method for manufacturing the same
09/25/2008US20080230871 Semiconductor display device and method of manufacturing the same
09/25/2008US20080230869 Ultra-thin soi vertical bipolar transistors with an inversion collector on thin-buried oxide (box) for low substrate-bias operation and methods thereof
09/25/2008US20080230868 Pattern enhancement by crystallographic etching
09/25/2008US20080230857 Sensor chip and substrate assembly for mems device
09/25/2008US20080230856 Intermediate probe structures for atomic force microscopy
09/25/2008US20080230855 Gate strip with reduced thickness
09/25/2008US20080230854 Semiconductor device containing crystallographically stabilized doped hafnium zirconium based materials
09/25/2008US20080230853 Channel layer arranged on substrate; source electrode and drain electrode, overcoating with dielectric then barrier electrode
09/25/2008US20080230851 Metal oxide semiconductor (mos) type semiconductor device and manufacturing method thereof
09/25/2008US20080230848 Structure having dual silicide region and related method
09/25/2008US20080230846 Method of manufacturing metal silicide contacts
09/25/2008US20080230845 Semiconductor device and method of forming the same
09/25/2008US20080230844 Semiconductor Device with Multiple Silicide Regions
09/25/2008US20080230842 Semiconductor Device Having High-K Gate Dielectric Layer and Method For Manufacturing the Same
09/25/2008US20080230841 Integrated circuit system employing stress memorization transfer
09/25/2008US20080230839 Method of producing a semiconductor structure
09/25/2008US20080230837 Radiation-hardened silicon-on-insulator cmos device, and method of making the same
09/25/2008US20080230835 Semiconductor device and manufacturing method thereof
09/25/2008US20080230833 Semiconductor component and method for producing a semiconductor component
09/25/2008US20080230832 Transistor and method for fabricating the same
09/25/2008US20080230831 Semiconductor device and manufacturing method thereof
09/25/2008US20080230830 Nonvolatile memory device and method of fabricating the same
09/25/2008US20080230829 Memory device and method of fabricating the same
09/25/2008US20080230827 Scalable flash/nv structures and devices with extended endurance
09/25/2008US20080230826 Construction of flash memory chips and circuits from ordered nanoparticles
09/25/2008US20080230825 Nonvolatile semiconductor memory device
09/25/2008US20080230823 Semiconductor device and manufacturing method therefor
09/25/2008US20080230820 Semiconductor device
09/25/2008US20080230816 Semiconductor device and method of manufacturing the same
09/25/2008US20080230815 Mitigation of gate to contact capacitance in CMOS flow
09/25/2008US20080230814 Methods for fabricating a semiconductor device
09/25/2008US20080230812 Isolated junction field-effect transistor
09/25/2008US20080230811 Semiconductor Structure
09/25/2008US20080230810 Insulated gate semiconductor device
09/25/2008US20080230809 Semiconductor device and method of fabricating the same
09/25/2008US20080230808 Heterojunction bipolar transistor
09/25/2008US20080230807 Semiconductor Device
09/25/2008US20080230805 Semiconductor device and method of manufacturing semiconductor device
09/25/2008US20080230804 Semiconductor device and fabrication method of same
09/25/2008US20080230803 Integrated Contact Interface Layer
09/25/2008US20080230802 Semiconductor Device Comprising a Heterojunction
09/25/2008US20080230801 Trench type power semiconductor device and method for manufacturing same
09/25/2008US20080230800 N-Type Group III Nitride Semiconductor Layered Structure
09/25/2008US20080230786 High temperature performance capable gallium nitride transistor
09/25/2008US20080230785 Termination and contact structures for a high voltage GaN-based heterojunction transistor
09/25/2008US20080230784 Cascode circuit employing a depletion-mode, GaN-based fet
09/25/2008US20080230780 Group III Nitride Semiconductor Multilayer Structure
09/25/2008US20080230774 Organic thin-film transistor manufacturing method, organic thin-film transistor, and organic thin-film transistor sheet
09/25/2008US20080230767 Semiconductor device and method of manufacturing the same
09/25/2008US20080230766 Light emitting device
09/25/2008US20080230764 Composite structure; charge carrier confining zone, barrier and electroconductive layer; uniformity
09/25/2008US20080230763 Metallic Nanospheres Embedded in Nanowires Initiated on Nanostructures and Methods for Synthesis Thereof
09/25/2008US20080230007 Method and apparatus for manufacturing active matrix device including top gate type tft
09/25/2008DE112006002913T5 Speicherzelle auf der Basis eines negativen differentiellen Widerstandes mit versenktem Kanal Memory cell based on a negative differential resistance buried channel
09/25/2008DE112004001030B4 FINFET mit Doppelsiliziumgateschicht für chemisch-mechanische Poliereinebnung FinFET with double gate silicon layer for chemical mechanical Poliereinebnung
09/25/2008DE10354421B4 Verfahren zur Herstellung einer Gatekontaktstruktur eines Trench-Hochleistungstransistors und mit diesem Verfahren hergestellter Hochleistungstransistor A process for producing a structure of a gate contact trench and high power transistor manufactured with this method, high power transistor
09/25/2008DE10349582B4 Halbleiterdiode sowie dafür geeignetes Herstellungsverfahren Semiconductor diode as well as for suitable manufacturing process
09/25/2008DE10324100B4 Verfahren zur Herstellung eines robusten Halbleiterbauelements Process for the preparation of a robust semiconductor device
09/25/2008DE10312911B4 Halbleiterbauelement mit platzsparendem Randabschluss Semiconductor component with space saving edge termination
09/25/2008DE10297679B4 Dotierverfahren für vollständig verarmte SOI-Strukturen Doping for fully depleted SOI structures
09/25/2008DE102008014338A1 Halbleitervorrichtung mit MIS-Transistor des lateralen Typs A semiconductor device having a lateral type MIS transistor
09/25/2008DE102008014071A1 Siliciumcarbid-Halbleitervorrichtung Silicon carbide semiconductor device
09/25/2008DE102008000660A1 Siliziumkarbid-Halbleitervorrichtung und Verfahren zu ihrer Herstellung Silicon carbide semiconductor device and process for their preparation
09/25/2008DE102007057222A1 Transistor mit isoliertem Gate Insulated gate transistor
09/25/2008DE102007014038A1 Semiconductor component has semiconductor body with semiconductor area of conductor type and another semiconductor area of conductor type, and third semiconductor area of former conductor type is complementary for latter conductor type
09/25/2008DE102007013848A1 Semiconductor component i.e. MOSFET, has floating doped regions electrically connected with field plates and formed complementary to drift distance, where field plates are coupled with field plates voltage limiting structure
09/25/2008DE10160118B4 Halbleiterelement Semiconductor element
09/24/2008EP1973165A1 Silicon carbide bipolar semiconductor device
09/24/2008EP1973164A2 Thin film transistor and organic light emitting device including thin film transistor
09/24/2008EP1973163A2 High temperature performance capable gallium nitride transistor
09/24/2008EP1973149A1 Laser annealing method and laser annealing apparatus