Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
09/2014
09/18/2014WO2014142331A1 Semiconductor device
09/18/2014WO2014142105A1 Field effect transistor
09/18/2014WO2014142044A1 Semiconductor device
09/18/2014WO2014142043A1 Method for driving semiconductor device and semiconductor device
09/18/2014WO2014142040A1 Electronic element
09/18/2014WO2014142039A1 Logical operation element
09/18/2014WO2014141846A1 Method for forming organic semiconductor film
09/18/2014WO2014141838A1 Process for forming organic semiconductor film
09/18/2014WO2014141754A1 Silicon carbide semiconductor device
09/18/2014WO2014141662A1 Metal induced nanocrystallization of amorphous semiconductor quantum dots
09/18/2014WO2014141550A1 Capacitive pressure sensor and input device
09/18/2014WO2014141508A1 Capacitance type sensor, acoustic sensor, and microphone
09/18/2014WO2014141507A1 Capacitive sensor, acoustic sensor and microphone
09/18/2014WO2014141472A1 Semiconductor device, and manufacturing method for same
09/18/2014WO2014140094A1 Power semiconductor device and corresponding module
09/18/2014WO2014139652A1 Electrochemically-gated field-effect transistor, method for its manufacture, its use, and electronics comprising said field- effect transistor
09/18/2014WO2014139291A1 Manufacturing method of polycrystalline silicon layer, and polycrystalline silicon thin film transistor and manufacturing method thereof
09/18/2014WO2014139277A1 Gate device unit for cross array integration mode of bipolar resistive random access memory
09/18/2014WO2014139167A1 Transistor with modified gate structure
09/18/2014WO2014138869A1 Structure and method for manufacture of memory device with thin silicon body
09/18/2014US20140273495 Non-volatile memory devices and methods of fabricating the same
09/18/2014US20140273464 Method of Fabricating a FinFET Device
09/18/2014US20140273429 Methods of forming finfet devices with a shared gate structure
09/18/2014US20140273426 Method for Manufacturing Dummy Gate in Gate-Last Process and Dummy Gate in Gate-Last Process
09/18/2014US20140273423 Methods of forming a semiconductor device with a nanowire channel structure by performing an anneal process
09/18/2014US20140273422 Method for making semiconductor diodes with low reverse bias currents
09/18/2014US20140273417 Method for forming termination structure for gallium nitride schottky diode
09/18/2014US20140273412 Methods for Wet Clean of Oxide Layers over Epitaxial Layers
09/18/2014US20140273390 Bipolar Junction Transistors, Memory Arrays, and Methods of Forming Bipolar Junction Transistors and Memory Arrays
09/18/2014US20140273389 Semiconductor device having controlled final metal critical dimension
09/18/2014US20140273388 Method of manufacturing the trench of u-shape
09/18/2014US20140273387 Method Of Making High-Voltage MOS Transistors With Thin Poly Gate
09/18/2014US20140273386 Method of forming metal silicide layer
09/18/2014US20140273385 Interface for metal gate integration
09/18/2014US20140273384 Power transistor with increased avalanche current and energy rating
09/18/2014US20140273383 MOSFETs with Channels on Nothing and Methods for Forming the Same
09/18/2014US20140273381 METHOD AND STRUCTURE FOR pFET JUNCTION PROFILE WITH SiGe CHANNEL
09/18/2014US20140273380 FinFETs with Regrown Source/Drain and Methods for Forming the Same
09/18/2014US20140273379 Epitaxial growth of doped film for source and drain regions
09/18/2014US20140273378 Methods of fabricating integrated circuit device with fin transistors having different threshold voltages
09/18/2014US20140273377 Method for fabricating a semiconductor device
09/18/2014US20140273375 Methods for fabricating integrated circuits with semiconductor substrate protection
09/18/2014US20140273374 Vertical Doping and Capacitive Balancing for Power Semiconductor Devices
09/18/2014US20140273372 Method of manufacturing nonvolatile semiconductor memory device
09/18/2014US20140273370 Technique for manufacturing semiconductor devices comprising transistors with different threshold voltages
09/18/2014US20140273369 Methods of forming contacts to source/drain regions of finfet devices
09/18/2014US20140273365 Methods of forming contacts to source/drain regions of finfet devices by forming a region that includes a schottky barrier lowering material
09/18/2014US20140273364 Method of depositing the metal barrier layer comprising silicon dioxide
09/18/2014US20140273363 Method of patterning features of a semiconductor device
09/18/2014US20140273362 Method for manufacturing thin film transistor and array substrate
09/18/2014US20140273360 Faceted semiconductor nanowire
09/18/2014US20140273359 Semiconductor device having blocking pattern and method for fabricating the same
09/18/2014US20140273358 Circuit Structures, Memory Circuitry, And Methods
09/18/2014US20140273357 Vertical Power MOSFET And IGBT Fabrication Process With Two Fewer Photomasks
09/18/2014US20140273343 Method for manufacturing semiconductor device
09/18/2014US20140273342 Vth control method of multiple active layer metal oxide semiconductor tft
09/18/2014US20140273341 Methods for Forming Back-Channel-Etch Devices with Copper-Based Electrodes
09/18/2014US20140273340 High Productivity Combinatorial Screening for Stable Metal Oxide TFTs
09/18/2014US20140273324 Methods for manufacturing chemical sensors with extended sensor surfaces
09/18/2014US20140273323 Method of manufacture of advanced heterojunction transistor and transistor laser
09/18/2014US20140269103 Nonvolatile memory device and method of manufacturing the same
09/18/2014US20140269078 Memory architecture of thin film 3d array
09/18/2014US20140269047 Apparatus and methods relating to a memory cell having a floating body
09/18/2014US20140269015 Use of hydrocarbon nanorings for data storage
09/18/2014US20140266407 Bipolar junction transistor and operating and manufacturing method for the same
09/18/2014US20140266403 Low Loss Electronic Devices Having Increased Doping for Reduced Resistance and Methods of Forming the Same
09/18/2014US20140266393 Bipolar transistor with lowered 1/f noise
09/18/2014US20140266324 High Electron Mobility Transistor with Multiple Channels
09/18/2014US20140264879 Copper-filled trench contact for transistor performance improvement
09/18/2014US20140264873 Interconnection Structure And Method For Semiconductor Device
09/18/2014US20140264825 Ultra-Low Resistivity Contacts
09/18/2014US20140264782 Formation of a high aspect ratio contact hole
09/18/2014US20140264781 Passivation layer for harsh environments and methods of fabrication thereof
09/18/2014US20140264780 Adhesion layer to minimize dielectric constant increase with good adhesion strength in a pecvd process
09/18/2014US20140264776 Semiconductor Wafer With A LayerOf AlzGa1-zN and Process For Producing It
09/18/2014US20140264775 Method and system for transient voltage suppression
09/18/2014US20140264774 Wafer and film coating method of using the same
09/18/2014US20140264765 Semiconductor wafer and method of producing same
09/18/2014US20140264764 Layer arrangement
09/18/2014US20140264763 Engineered substrates for semiconductor epitaxy and methods of fabricating the same
09/18/2014US20140264757 Metal structures and methods of using same for transporting or gettering materials disposed within semiconductor substrates
09/18/2014US20140264756 Stacked integrated circuit
09/18/2014US20140264755 Strained silicon nfet and silicon germanium pfet on same wafer
09/18/2014US20140264745 Transmission Line Formed Adjacent Seal Ring
09/18/2014US20140264738 Folded conical inductor
09/18/2014US20140264728 Active Tiling Placement for Improved Latch-up Immunity
09/18/2014US20140264727 Semiconductor devices and methods of manufacturing the same
09/18/2014US20140264726 Structure and method for protected periphery semiconductor device
09/18/2014US20140264725 Silicon recess etch and epitaxial deposit for shallow trench isolation (sti)
09/18/2014US20140264724 Deep trench isolation
09/18/2014US20140264721 Isolation structure in a semiconductor device processes and structures
09/18/2014US20140264719 Varied STI Liners for Isolation Structures in Image Sensing Devices
09/18/2014US20140264717 Method of Fabricating a FinFET Device
09/18/2014US20140264715 Methods and apparatus for congestion-aware buffering using voltage isolation pathways for integrated circuit designs with multi-power domains
09/18/2014US20140264714 Power semiconductor devices incorporating single crystalline aluminum nitride substrate
09/18/2014US20140264713 Gate contact for a semiconductor device and methods of fabrication thereof
09/18/2014US20140264677 Chip Package with Isolated Pin, Isolated Pad or Isolated Chip Carrier and Method of Making the Same
09/18/2014US20140264657 Monolithically integrated multi-sensor device on a semiconductor substrate and method therefor
09/18/2014US20140264641 Semiconductor device comprising contact structures with protection layers formed on sidewalls of contact etch stop layers
09/18/2014US20140264640 Semiconductor device and method for fabricating the same
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