Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
03/2005
03/10/2005WO2005022631A1 Semiconductor package and manufacturing method thereof
03/10/2005WO2005022625A1 Basic cell, end section cell, wiring shape, wiring method, shield wiring structure
03/10/2005WO2005022599A2 Integrated circuit package having inductance loop formed from same-pin-to-same-bonding-pad structure
03/10/2005WO2005022597A2 Integrated circuit package having an inductance loop formed from a multi-loop configuration
03/10/2005WO2005022589A2 Organic semiconductor device and method for manufacturing same
03/10/2005WO2005022580A1 Heterojunction bipolar transistor with tunnelling mis emitter junction
03/10/2005WO2005022134A1 Field-effect transistor, single electron transistor, and sensor using same
03/10/2005US20050055494 Structure and method for silicided metal gate transistors
03/10/2005US20050055191 Methods of extracting SPICE parameters, performing a spice calculation, and performing device simulation for a partially-depleted SOI MOSFET
03/10/2005US20050054209 Plasma treatment method to reduce silicon erosion over HDI silicon regions
03/10/2005US20050054182 Method for suppressing boron penetration by implantation in P+ MOSFETS
03/10/2005US20050054181 Method of manufacturing a semiconductor device
03/10/2005US20050054177 Triple-diffused trench MOSFET and method of fabricating the same
03/10/2005US20050054174 Corner protection to reduce wrap around
03/10/2005US20050054172 Semiconductor device and mehtod
03/10/2005US20050054171 Incorporation of carbon in silicon/silicon germanium epitaxial layer to enhance yield for Si-Ge bipolar technology
03/10/2005US20050054170 Method of producing complementary sige bipolar transistors
03/10/2005US20050054169 Method of manufacture of raised source drain mosfet with top notched gate structure filled with dielectric plug in and device manufactured thereby
03/10/2005US20050054168 Semiconductor structures employing strained material layers with defined impurity gradients and methods for fabricating same
03/10/2005US20050054167 Local SONOS-type nonvolatile memory device and method of manufacturing the same
03/10/2005US20050054166 Conductive metal oxide gate ferroelectric memory transistor
03/10/2005US20050054165 Atomic layer deposited ZrAlxOy dielectric layers
03/10/2005US20050054164 Strained silicon MOSFETs having reduced diffusion of n-type dopants
03/10/2005US20050054163 Method of manufacturing transistor having recessed channel
03/10/2005US20050054162 Method to make minimal spacing between floating gates in split gate flash
03/10/2005US20050054160 Method of making nonvolatile transistor pairs with shared control gate
03/10/2005US20050054153 Method for manufacturing movable portion of semiconductor device
03/10/2005US20050054150 Apparatus and method of manufacture for integrated circuit and CMOS device including epitaxially grown dielectric on silicon carbide
03/10/2005US20050054149 Method for integrating metals having different work functions to fom cmos gates having a high-k gate dielectric and related structure
03/10/2005US20050054146 Photo-mask process and method for manufacturing a thin film transistor using the process
03/10/2005US20050054145 Method for reduced n+ diffusion in strained si on sige substrate
03/10/2005US20050053773 Structure, method of manufacturing the same, and device using the same
03/10/2005US20050052939 Semiconductor non-volatile memory
03/10/2005US20050052926 Nonvolatile semiconductor memory device
03/10/2005US20050052918 Semiconductor device having a byte-erasable eeprom memory
03/10/2005US20050052915 Nonvolatile memory cell without a dielectric antifuse having high- and low-impedance states
03/10/2005US20050052906 Row decoder in flash memory and erase method of flash memory cell using the same
03/10/2005US20050052604 Array substrate for in plane switching mode liquid crystal display device and method for manufacturing the same
03/10/2005US20050052592 Electro-optical device, method of manufacturing the same, and electronic apparatus
03/10/2005US20050052590 Liquid crystal display device
03/10/2005US20050052583 Method for forming pattern of liquid crystal display device and method for fabricating thin film transistor array substrate of liquid crystal display device using the same
03/10/2005US20050052445 Method of mending breakage of line in display device
03/10/2005US20050052386 Method of processing image signals for improved image quality
03/10/2005US20050052228 Non-volatile flash memory
03/10/2005US20050052215 Integrated circuit, interface circuit used in the integrated circuit, and apparatus using the integrated circuit
03/10/2005US20050051910 Capacitance type dynamic quantity sensor device
03/10/2005US20050051908 Diode exhibiting a high breakdown voltage
03/10/2005US20050051887 Clock distribution networks and conductive lines in semiconductor integrated circuits
03/10/2005US20050051885 Semiconductor package structure
03/10/2005US20050051882 Stacked chip package having upper chip provided with trenches and method of manufacturing the same
03/10/2005US20050051867 SRAM cell and methods of fabrication
03/10/2005US20050051862 Over charge protection device
03/10/2005US20050051857 Semiconductor device
03/10/2005US20050051856 Semiconductor device
03/10/2005US20050051855 Semiconductor device
03/10/2005US20050051854 Structure and method for metal replacement gate of high performance
03/10/2005US20050051852 Memory devices with memory cell transistors having gate sidewall spacers with different dielectric properties and methods of fabricating the same
03/10/2005US20050051851 Structure and method of making strained channel cmos transistors having lattice-mismatched epitaxial extension and source and drain regions
03/10/2005US20050051850 Semiconductor device and method of manufacturing the same
03/10/2005US20050051849 Semiconductor device, method of manufacturing the same and liquid jet apparatus
03/10/2005US20050051845 Semiconductor device and manufacturing method therefor
03/10/2005US20050051843 Semiconductor device and manufacturing method thereof
03/10/2005US20050051842 Apparatus and a manufacturing method of a thin-film transistor LCD
03/10/2005US20050051841 Stress-controlled dielectric integrated circuit
03/10/2005US20050051840 High withstand-voltage semiconductor device and method of fabricating the same
03/10/2005US20050051839 Reduced cap layer erosion for borderless contacts
03/10/2005US20050051837 Nonvolatile semiconductor memory device and method of manufacturing the same
03/10/2005US20050051836 Split-gate nonvolatile memory device and method of manufacturing the same
03/10/2005US20050051835 EEPROM device for increasing a coupling ratio and fabrication method thereof
03/10/2005US20050051834 Semiconductor device and method of manufacturing the same
03/10/2005US20050051833 [flash memory cell and manufacturing method thereof]
03/10/2005US20050051832 Semiconductor device and a method of manufacturing the same
03/10/2005US20050051831 Nonvolatile semiconductor memory and method for fabricating the same
03/10/2005US20050051830 Trench corner effect bidirectional flash memory cell
03/10/2005US20050051825 Semiconductor device and manufacturing method thereof
03/10/2005US20050051820 Fabrication process for a magnetic tunnel junction device
03/10/2005US20050051815 Short-channel Schottky-barrier MOSFET device and manufacturing method
03/10/2005US20050051814 Semiconductor device and a method of manufacturing the same
03/10/2005US20050051813 Monolithically integrated resistive structure with power IGBT (insulated gate bipolar transistor) devices
03/10/2005US20050051812 Multiple gate semiconductor device and method for forming same
03/10/2005US20050051811 Semiconductor device, a manufacturing method thereof, and a camera
03/10/2005US20050051806 Memory cell unit, nonvolatile semiconductor device, and liquid crystal display device including the nonvolatile semiconductor device
03/10/2005US20050051805 Nanotube transistor device
03/10/2005US20050051804 Nitride-based compound semiconductor electron device
03/10/2005US20050051802 Semiconductor device
03/10/2005US20050051801 Standard cell back bias architecture
03/10/2005US20050051800 Cascode amplifier structures including wide bandgap field effect transistor with field plates
03/10/2005US20050051799 Heterojunction bipolar transistor structure
03/10/2005US20050051798 Silicon germanium heterojunction bipolar transistor with carbon incorporation
03/10/2005US20050051796 Wide bandgap transistor devices with field plates
03/10/2005US20050051795 Epitaxial growth of relaxed silicon germanium layers
03/10/2005US20050051794 Integrated circuit
03/10/2005US20050051793 Switching semiconductor device and switching circuit
03/10/2005US20050051785 Electronic device contact structures
03/10/2005US20050051784 Semiconductor light-receiving device
03/10/2005US20050051780 Thin film transistor, display device and their production
03/10/2005US20050051779 Semiconductor device
03/10/2005US20050051777 Solid state white light emitter and display using same
03/10/2005US20050051776 Display device and method for manufacturing the same
03/10/2005US20050051775 Semiconductor pixel arrays with reduced sensitivity to defects
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