Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
03/2005
03/01/2005US6861689 One transistor DRAM cell structure and method for forming
03/01/2005US6861688 Line configuration for bit lines for contact-connecting at least one memory cell, semiconductor component with a line configuration and method for fabricating a line configuration
03/01/2005US6861685 Floating trap type nonvolatile memory device and method of fabricating the same
03/01/2005US6861684 Method of fabricating a vertical insulated gate transistor with low overlap of the gate on the source and the drain, and an integrated circuit including this kind of transistor
03/01/2005US6861680 Silicon-on-insulator diodes and ESD protection circuits
03/01/2005US6861679 Gallium indium nitride arsenide based epitaxial wafer, a hetero field effect transistor using the wafer, and a method of fabricating the hetero field effect transistor
03/01/2005US6861678 Double diffused vertical JFET
03/01/2005US6861674 Electroluminescent device
03/01/2005US6861673 Chip CMOS optical element
03/01/2005US6861671 Thin film transistor liquid crystal display and fabrication method thereof
03/01/2005US6861670 Semiconductor device having multi-layer wiring
03/01/2005US6861669 Compound display
03/01/2005US6861668 Thin film transistor (TFT) and method for fabricating the TFT
03/01/2005US6861664 Device with n-type semiconductor
03/01/2005US6861614 S system for the formation of a silicon thin film and a semiconductor-insulating film interface
03/01/2005US6861587 Low stress die attachment
03/01/2005US6861377 Surface treatment method, surface-treated substrate, method for forming film pattern, method for making electro-optical device, electro-optical device, and electronic apparatus
03/01/2005US6861375 Method of fabricating semiconductor device
03/01/2005US6861374 Semiconductor device having patterned SOI structure and method for fabricating the same
03/01/2005US6861372 Semiconductor device manufacturing method
03/01/2005US6861369 Method of forming silicidation blocking layer
03/01/2005US6861368 Array substrate for a liquid crystal display device having an improved contact property and fabricating method thereof
03/01/2005US6861356 Method of forming a barrier film and method of forming wiring structure and electrodes of semiconductor device having a barrier film
03/01/2005US6861350 Method of manufacturing semiconductor device comprising silicon-rich tasin metal gate electrode
03/01/2005US6861344 Method of manufacturing a semiconductor integrated circuit device
03/01/2005US6861341 Systems and methods for integration of heterogeneous circuit devices
03/01/2005US6861340 Method of heat-treating nitride compound semiconductor layer and method of producing semiconductor device
03/01/2005US6861339 Method for fabricating laminated silicon gate electrode
03/01/2005US6861338 Thin film transistor and method of manufacturing the same
03/01/2005US6861337 Method for using a surface geometry for a MOS-gated device in the manufacture of dice having different sizes
03/01/2005US6861335 Method for fabricating a semiconductor device that includes light beam irradiation to separate a semiconductor layer from a single crystal substrate
03/01/2005US6861328 Semiconductor device, manufacturing method therefor, and semiconductor manufacturing apparatus
03/01/2005US6861324 Method of forming a super self-aligned hetero-junction bipolar transistor
03/01/2005US6861323 Method for forming a SiGe heterojunction bipolar transistor having reduced base resistance
03/01/2005US6861322 Method of manufacturing a semiconductor device
03/01/2005US6861320 Method of making starting material for chip fabrication comprising a buried silicon nitride layer
03/01/2005US6861319 Gate electrode and method of fabricating the same
03/01/2005US6861318 Semiconductor transistor having a stressed channel
03/01/2005US6861317 Method of making direct contact on gate by using dielectric stop layer
03/01/2005US6861316 Semiconductor device and method for fabricating the same
03/01/2005US6861313 Semiconductor memory device and fabrication method thereof using damascene bitline process
03/01/2005US6861307 Fully isolated dielectric memory cell structure for a dual bit nitride storage device and process for making same
03/01/2005US6861306 Method of forming a split-gate memory cell with a tip in the middle of the floating gate
03/01/2005US6861303 JFET structure for integrated circuit and fabrication method
03/01/2005US6861302 Method of forming a thin film transistor on a transparent plate
03/01/2005US6861301 Method of forming a thin film transistor on a transparent plate
03/01/2005US6861300 Fabricating method of polysilicon thin film transistor having a space and a plurality of channels
03/01/2005US6861299 Process for manufacturing thin film transistor on unannealed glass substrate
03/01/2005US6861298 Method of fabricating CMOS thin film transistor
03/01/2005US6861296 Method for creating thick oxide on the bottom surface of a trench structure in silicon
03/01/2005US6861285 Flip chip underfill process
03/01/2005US6861276 Method for fabricating a single chip multiple range pressure transducer device
03/01/2005US6861030 Method of manufacturing high purity zirconium and hafnium
03/01/2005US6860943 Method for producing group III nitride compound semiconductor
02/2005
02/24/2005WO2005018006A1 Array board, liquid crystal display and method for producing array board
02/24/2005WO2005018005A1 Semiconductor device including mosfet having band-engineered superlattice
02/24/2005WO2005018004A1 Method for making semiconductor device including band-engineered superlattice
02/24/2005WO2005018003A1 Linear device
02/24/2005WO2005017993A1 Method for asymmetric sidewall spacer formation
02/24/2005WO2005017992A1 Field effect transistor having a doped gate electrode with reduced gate depletion and method of forming the transistor
02/24/2005WO2005017986A1 Silicon carbide epitaxial wafer, method for producing such wafer, and semiconductor device formed on such wafer
02/24/2005WO2005017976A2 Device threshold control of front-gate silicon-on-insulator mosfet using a self-aligned back-gate
02/24/2005WO2005017975A2 Anchors for microelectromechanical systems having an soi substrate, and method of fabricating same
02/24/2005WO2005017974A2 Improved integrated circuit substrate material and method
02/24/2005WO2005017972A2 Method for microfabricating structures using silicon-on-insulator material
02/24/2005WO2005017967A2 Nanotube device structure and methods of fabrication
02/24/2005WO2005017963A2 Surface preparation prior to deposition on germanium
02/24/2005WO2005017962A2 System and process for producing nanowire composites and electronic substrates therefrom
02/24/2005WO2005017960A2 Quantum dot infrared photodetector focal plane array
02/24/2005WO2005017951A2 Quantum dots, nanocomposite materials with quantum dots, optical devices with quantum dots, and related fabrication methods
02/24/2005WO2005017494A2 A frequency selective terahertz radiation detector
02/24/2005WO2004112105A3 Multi-step chemical mechanical polishing of a gate area in a finfet
02/24/2005WO2004100290A3 Multi-height finfets
02/24/2005WO2004081984A3 Two-step post nitridation annealing for lower eot plasma nitrided gate dielectrics
02/24/2005WO2004055872A3 Columnar structured material and method of manufacturing the same
02/24/2005WO2004049451A3 Boron phosphide-based compound semiconductor device, production method thereof and light-emitting diode
02/24/2005WO2004001801A3 Insulated-gate semiconductor device and approach involving junction-induced intermediate region
02/24/2005US20050043013 Optical property normalization for a transparent electrical device
02/24/2005US20050042887 Diffusion barrier
02/24/2005US20050042872 Process for forming lead-free bump on electronic component
02/24/2005US20050042865 Atomic layer deposition of metallic contacts, gates and diffusion barriers
02/24/2005US20050042864 Ohmic contact structure and method for the production of the same
02/24/2005US20050042849 Reacted conductive gate electrodes
02/24/2005US20050042848 Complementary junction-narrowing implants for ultra-shallow junctions
02/24/2005US20050042846 Fabrication process for a semiconductor device having a metal oxide dielectric material with a high dielectric constant, annealed with a buffered anneal process
02/24/2005US20050042842 Germanium on insulator fabrication via epitaxial germanium bonding
02/24/2005US20050042836 Capacitor for semiconductor device, manufacturing method thereof, and electronic device employing the same
02/24/2005US20050042834 Electroluminescent devices and displays with integrally fabricated address and logic devices fabricated by printing or weaving
02/24/2005US20050042833 Method of manufacturing integrated circuit device including recessed channel transistor
02/24/2005US20050042832 Method of fabricating transistor of DRAM semiconductor device
02/24/2005US20050042830 High voltage power MOSFET having a voltage sustaining region that includes Doped Columns Formed by trench etching and diffusion from regions of oppositely doped polysilicon
02/24/2005US20050042828 Semiconductor device with split gate electrode structure and method for manufacturing the semiconductor device
02/24/2005US20050042826 Flash memory cell and fabricating method thereof
02/24/2005US20050042817 Circuit array substrate
02/24/2005US20050042815 Modular Bipolar-CMOS-DMOS analog integrated circuit and power transistor technology
02/24/2005US20050042814 Compound semiconductor multilayer structure, hall device, and hall device manufacturing method
02/24/2005US20050042813 Non-volatile semiconductor memory device, method for manufacturing same and method for controlling same
02/24/2005US20050042809 Bottom gate-type thin-film transistor and method for manufacturing the same
02/24/2005US20050042808 Semiconductor device and method of fabricating the same
02/24/2005US20050042806 Silicon on insulator device and layout method of the same