Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
06/2005
06/14/2005US6905907 Light emitting device and manufacturing method thereof
06/14/2005US6905906 Solution processed devices
06/14/2005US6905897 Wafer acceptance testing method and structure of a test key used in the method
06/14/2005US6905892 Operating method for a semiconductor component
06/14/2005US6905557 Multilayer structure; polishing surfaces; vertical bonding
06/14/2005US6904808 Pressure sensor and method for manufacturing pressure sensor
06/14/2005CA2113958C Semiconductor device and method for manufacturing the same
06/09/2005WO2005053035A1 Low-power multiple-channel fully depleted quantum well cmosfets
06/09/2005WO2005053034A1 Semiconductor element
06/09/2005WO2005053033A2 Trench insulated gate field-effect transistor
06/09/2005WO2005053032A2 Trench insulated gate field effect transistor
06/09/2005WO2005053031A2 Trench insulated gate field effect transistor
06/09/2005WO2005053030A1 Strained semiconductor devices
06/09/2005WO2005053029A1 DIAMOND n-TYPE SEMICONDUCTOR, MANUFACTURING METHOD THEREOF, SEMICONDUCTOR ELEMENT, AND ELECTRON EMITTING ELEMENT
06/09/2005WO2005053020A1 Apparatus and method for vertical split-gate nrom memory
06/09/2005WO2005053011A1 Structure comprising tunable anti-reflective coating and method of forming thereof
06/09/2005WO2005052997A2 Solid-state high power device and method
06/09/2005WO2005052991A2 High k dielectric film
06/09/2005WO2005038930A3 Structuring method, and field effect transistors
06/09/2005WO2005024900A3 Bipolar transistor having raised extrinsic base with selectable self-alignment and methods of forming same
06/09/2005WO2005022653A3 Magnetoresistive random access memory with reduced switching field variation
06/09/2005WO2005022580A8 Heterojunction bipolar transistor with tunnelling mis emitter junction
06/09/2005WO2005001899A3 Non-volatile electromechanical field effect devices and circuits using same and methods of forming same
06/09/2005WO2004107399A3 Transistor with independant gate structures
06/09/2005WO2004071066A3 Backthinned cmos sensor with low fixed pattern noise
06/09/2005WO2004070785A3 Backside thinning of image array devices
06/09/2005WO2004059697B1 Adaptive negative differential resistance device
06/09/2005US20050124242 Laminates of a textile material and a polymer film having regions of differing translucency made by selectively compressing regions of the polymer film; breathable and/or waterproof for garments, tents
06/09/2005US20050124176 Semiconductor device and method for fabricating the same and semiconductor device application system
06/09/2005US20050124175 Lanthanide oxide/zirconium oxide atomic layer deposited nanolaminate gate dielectrics
06/09/2005US20050124174 Lanthanide doped TiOx dielectric films by plasma oxidation
06/09/2005US20050124158 Silver under-layers for electroless cobalt alloys
06/09/2005US20050124152 Composite sacrificial material
06/09/2005US20050124133 Method of forming a PIP capacitor
06/09/2005US20050124130 Semiconductor fabrication process with asymmetrical conductive spacers
06/09/2005US20050124128 Methods for manufacturing semiconductor device
06/09/2005US20050124127 Method for manufacturing gate structure for use in semiconductor device
06/09/2005US20050124126 Method for fabricating silicide
06/09/2005US20050124125 Non-silicon semiconductor and high-k gate dielectric metal oxide semiconductor field effect transistors
06/09/2005US20050124123 Fabrication method for semiconductor device and manufacturing apparatus for the same
06/09/2005US20050124121 Anneal of high-k dielectric using NH3 and an oxidizer
06/09/2005US20050124120 Method and circuit for multiplying signals with a transistor having more than one independent gate structure
06/09/2005US20050124119 Open drain input/output structure and manufacturing method thereof in semiconductor device
06/09/2005US20050124117 Method of fabricating flash memory device and flash memory device fabricated thereby
06/09/2005US20050124112 Asymmetric-area memory cell
06/09/2005US20050124110 Method for forming a self-aligned buried strap in a vertical memory cell
06/09/2005US20050124107 Method of fabricating a semiconductor device with a trench isolation structure and semiconductor device
06/09/2005US20050124106 Reverse metal process for creating a metal silicide transistor gate structure
06/09/2005US20050124105 Semiconductor device and method of manufacturing the same
06/09/2005US20050124104 Methods of fabricating semiconductor device having T-shaped gate and L-shaped spacer
06/09/2005US20050124103 Method for manufacturing NAND flash device
06/09/2005US20050124101 Oxide/nitride stacked in finfet spacer process
06/09/2005US20050124100 Electronic device comprising enhancement mode pHEMT devices, depletion mode pHEMT devices, and power pHEMT devices on a single substrate and method of creation
06/09/2005US20050124099 Selfaligned source/drain finfet process flow
06/09/2005US20050124098 Method of reducing noise disturbing a signal in an electronic device
06/09/2005US20050124088 Method of manufacturing a thin film transistor array
06/09/2005US20050124086 Method for manufacturing a semiconductor device, and method for manufacturing a wafer
06/09/2005US20050124083 Method for manufacturing semiconductor device
06/09/2005US20050124082 Method for manufacturing semiconductor device
06/09/2005US20050124081 Manufacturing method for a semiconductor device
06/09/2005US20050123751 Electrode device for organic device, electronic device having electrode device for organic device, and method of forming electrode device for organic device
06/09/2005US20050122787 Memory transistor and methods
06/09/2005US20050122784 Methods of fabricating floating trap non-volatile semiconductor memory devices including high dielectric constant blocking insulating layers
06/09/2005US20050122783 Methods of erasing a non-volatile memory device having discrete charge trap sites
06/09/2005US20050122775 Novolatile semiconductor memory device and manufacturing process of the same
06/09/2005US20050122773 Self-aligned, low-ressistance, efficient memory array
06/09/2005US20050122748 Semiconductor device and method of manufacturing thereof
06/09/2005US20050122646 Semiconductor integrated circuit device
06/09/2005US20050122459 Liquid crystal display
06/09/2005US20050122452 Liquid crystal display and method of manufacturing the same
06/09/2005US20050122447 Electro-optical display device and image projection unit
06/09/2005US20050122442 Liquid crystal display device and method of fabricating the same
06/09/2005US20050122349 Display device
06/09/2005US20050122295 Liquid crystal display and driving method thereof
06/09/2005US20050122288 Active matrix electroluminescent display devices, and their manufacture
06/09/2005US20050122040 Method of manufacturing an electroluminescent device
06/09/2005US20050122032 Large display device and fabrication method thereof
06/09/2005US20050121802 Offset-bonded, multi-chip semiconductor device
06/09/2005US20050121798 Method for reducing or eliminating semiconductor device wire sweep in a multi-tier bonding device and a device produced by the method
06/09/2005US20050121797 Configuration for testing the bonding positions of conductive drops and test method for using the same
06/09/2005US20050121792 Interconnection structure and method for forming the same
06/09/2005US20050121786 Substrate, interlayer interconnection structure including porous insulation film in which a volume occupation ratio of pores of diameter greater than 0.6 nanometers is less than 30%, and conductive part containing metal; parasitic capacitance, degradation prevented
06/09/2005US20050121760 Semiconductor module
06/09/2005US20050121749 Bipolar transistor including an improved emitter structure for large emitter current free of decrease in direct current amplification factor and design method therefor
06/09/2005US20050121748 Bipolar transistor having self-aligned silicide and a self-aligned emitter contact border
06/09/2005US20050121747 Automatically passivated n-p junction and a method for making it
06/09/2005US20050121746 High performance diode implanted voltage controlled p-type diffusion resistor
06/09/2005US20050121741 Apparatus and method for electronic fuse with improved ESD tolerance
06/09/2005US20050121740 Gapped-plate capacitor
06/09/2005US20050121736 Receiver optical subassembly
06/09/2005US20050121734 Combination catheter devices, methods, and systems
06/09/2005US20050121733 Method of forming a semiconductor device with a high dielectric constant material and an offset spacer
06/09/2005US20050121732 Active semiconductor component with an optimized surface area
06/09/2005US20050121731 Formation of abrupt junctions in devices by using silicide growth dopant snowplow effect
06/09/2005US20050121730 Protective device
06/09/2005US20050121729 Structure and method for III-nitride monolithic power IC
06/09/2005US20050121728 OFETs with active channels formed of densified layers
06/09/2005US20050121726 Semiconductor device and method for fabricating the same
06/09/2005US20050121725 Electrostatic damage protection device
06/09/2005US20050121724 MOS transistor and method of manufacturing the same
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