Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
06/2005
06/23/2005US20050136688 Method of inhibiting degradation of gate oxide film
06/23/2005US20050136679 Hydrogen free integration of high-k gate dielectrics
06/23/2005US20050136677 Method for making a semiconductor device that includes a metal gate electrode
06/23/2005US20050136676 Method of forming a floating gate for a split-gate flash memory device
06/23/2005US20050136659 Method of forming cobalt disilicide layer and method of manufacturing semiconductor device using the same
06/23/2005US20050136658 Manufacture of semiconductor device having insulation film of high dielectric constant
06/23/2005US20050136655 Method to manufacture silicon quantum islands and single-electron devices
06/23/2005US20050136643 Dielectric film forming method for semiconductor device and semiconductor device
06/23/2005US20050136642 Method for fabricating semiconductor device
06/23/2005US20050136637 Indium oxide conductive film structures
06/23/2005US20050136633 Blocking layer for silicide uniformity in a semiconductor transistor
06/23/2005US20050136632 Implementation of split gate transistor technology with high-k gate dielectrics
06/23/2005US20050136629 Manufacturing method of semiconductor device
06/23/2005US20050136626 Methods of forming a high germanium concentration silicon germanium alloy by epitaxial lateral overgrowth and structures formed thereby
06/23/2005US20050136625 Ultra-thin glass devices
06/23/2005US20050136623 Shallow amorphizing implant for gettering of deep secondary end of range defects
06/23/2005US20050136617 MOS transistor having protruded-shape channel and method of fabricating the same
06/23/2005US20050136616 Method of fabricating a recess channel array transistor using a mask layer with a high etch selectivity with respect to a silicon substrate
06/23/2005US20050136613 Forming of the periphery of a schottky diode with MOS trenches
06/23/2005US20050136612 Method of forming poly-silicon crystallization
06/23/2005US20050136607 Methods of fabricating semiconductor devices
06/23/2005US20050136605 MOS transistor gates with thin lower metal silicide and methods for making the same
06/23/2005US20050136603 Manufacturing method of semiconductor device
06/23/2005US20050136600 Magnetic elements with ballistic magnetoresistance utilizing spin-transfer and an MRAM device using such magnetic elements
06/23/2005US20050136598 Thin-film transistor used as heating element for microreaction chamber
06/23/2005US20050136597 Method of manufacturing semiconductor device including nonvolatile memory
06/23/2005US20050136595 Method for manufacturing semiconductor device
06/23/2005US20050136589 Method for integrating high-k dielectrics in transistor devices
06/23/2005US20050136587 Semiconductor device having reduced gate charge and reduced on resistance and method
06/23/2005US20050136586 Method of making a non-volatile memory using a plasma oxidized high-k charge-trapping layer
06/23/2005US20050136585 Method of fabricating semiconductor devices with replacement, coaxial gate structure
06/23/2005US20050136582 Method and device for automated layer generation for double-gate FinFET designs
06/23/2005US20050136581 Semiconductor memory cell and semiconductor memory device
06/23/2005US20050136580 Hydrogen free formation of gate electrodes
06/23/2005US20050136579 Method for manufacturing a metal oxide transistor having reduced 1/f noise
06/23/2005US20050136578 Method of manufacturing thin film transistor
06/23/2005US20050136577 Microelectronic device fabrication method
06/23/2005US20050136574 Thin film transistor and process for making an array panel
06/23/2005US20050136573 Method of making direct contact on gate by using dielectric stop layer
06/23/2005US20050136566 Methods of forming a high germanium concentration silicon germanium alloy by epitaxial lateral overgrowth and structures formed thereby
06/23/2005US20050136558 Stacked semiconductor device assembly and method for forming
06/23/2005US20050136556 Manufacturing method of semiconductor device
06/23/2005US20050136358 Patterning using wax printing and lift off
06/23/2005US20050135155 Nonvolatile semiconductor memory device
06/23/2005US20050135154 Nonvolatile semiconductor memory adapted to store a multi-valued data in a single memory cell
06/23/2005US20050134779 Thin film panel
06/23/2005US20050134754 Method of fabricating liquid crystal display device
06/23/2005US20050134753 Electrooptical device, method of manufacturing the same, and electronic equipment
06/23/2005US20050134540 Liquid crystal display and panel therefor
06/23/2005US20050133935 Embedded redistribution interposer for footprint compatible chip package conversion
06/23/2005US20050133917 Transistor device
06/23/2005US20050133887 Semiconductor component comprising areas with a high platinum concentration
06/23/2005US20050133886 Integrated circuit for differential variable capacitors
06/23/2005US20050133885 Capacitor and its manufacturing method, and semiconductor device
06/23/2005US20050133883 Three-dimensional memory structure and manufacturing method thereof
06/23/2005US20050133881 Semiconductor device employing buried insulating layer and method of fabricating the same
06/23/2005US20050133877 Chemical sensor
06/23/2005US20050133876 Reduced hydrogen sidewall spacer oxide
06/23/2005US20050133873 System for ESD protection with extra headroom in relatively low supply voltage integrated circuits
06/23/2005US20050133871 Electrostatic discharge protection device
06/23/2005US20050133869 [double-triggered silicon controlling rectifier and electrostatic discharge protection circuit thereof]
06/23/2005US20050133868 [electro-static discharge protection circuit for dual-polarity input/output pad]
06/23/2005US20050133867 Semiconductor device and method of fabricating the same
06/23/2005US20050133866 Novel field effect transistor and method of fabrication
06/23/2005US20050133864 Semiconductor device and method of manufacturing the same
06/23/2005US20050133862 Semiconductor device and manufacturing method thereof
06/23/2005US20050133861 Vertical gate semiconductor device and method for fabricating the same
06/23/2005US20050133859 Semiconductor device and design-aiding program
06/23/2005US20050133858 High-voltage vertical transistor with a multi-gradient drain doping profile
06/23/2005US20050133857 Power semiconductor component having a gentle turn-off behavior
06/23/2005US20050133856 Vertical-type metal insulator semiconductor field effect transistor device, and production method for manufacturing such transistor device
06/23/2005US20050133854 Semiconductor device having pad structure for preventing and buffering stress of silicon nitride film
06/23/2005US20050133853 Flash memory cell and method of erasing the same
06/23/2005US20050133852 High performance embedded semiconductor memory devices with multiple dimension first-level bit-lines
06/23/2005US20050133851 Vertical NAND flash memory array
06/23/2005US20050133850 Method for forming a box shaped polygate
06/23/2005US20050133849 Semiconductor memory device having self-aligned charge trapping layer and method of manufacturing the same
06/23/2005US20050133846 Deep trench capacitor with buried plate electrode and isolation collar
06/23/2005US20050133842 Semiconductor device and fabrication method of a semiconductor device
06/23/2005US20050133841 Charge-dipole coupled information storage medium
06/23/2005US20050133840 Synthetic antiferromagnet structures for use in mtjs in mram technology
06/23/2005US20050133837 Semiconductor device having enhanced photo sensitivity and method for manufacture thereof
06/23/2005US20050133836 Asymmetric MOS transistor with trench-type gate
06/23/2005US20050133835 Reduced hydrogen sidewall spacer oxide
06/23/2005US20050133834 Semiconductor device and fabrication method thereof
06/23/2005US20050133833 Metal oxide semiconductor device and fabricating method thereof
06/23/2005US20050133831 Body contact formation in partially depleted silicon on insulator device
06/23/2005US20050133830 Method for fabricating a recessed channel filed effect transistor (FET) device
06/23/2005US20050133829 High-frequency semiconductor device
06/23/2005US20050133828 Corner protection to reduce wrap around
06/23/2005US20050133821 Semiconductor device
06/23/2005US20050133820 Heterojunction bipolar transistor and method of fabricating the same
06/23/2005US20050133819 Semiconductor device using strained silicon layer and method of manufacturing the same
06/23/2005US20050133818 Gallium nitride material devices including an electrode-defining layer and methods of forming the same
06/23/2005US20050133817 Improved Cobalt Silicidation Process for Substrates with a Silicon Germanium Layer
06/23/2005US20050133815 Triac operating in quadrants Q1 and Q4
06/23/2005US20050133814 Semiconductor device
06/23/2005US20050133813 Systems and methods for biasing high fill-factor sensor arrays and the like
06/23/2005US20050133807 Nitride semiconductor light emitting device
06/23/2005US20050133806 P and N contact pad layout designs of GaN based LEDs for flip chip packaging
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