Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
05/2007
05/31/2007WO2007061826A2 Electronic device contact structures
05/31/2007WO2007061669A1 Dielectric media including surface-treated metal oxide particles
05/31/2007WO2007061308A1 Varactor element and low distortion varactor circuit arrangement
05/31/2007WO2007060970A1 Schottky barrier diode and method for using the same
05/31/2007WO2007060938A1 Semiconductor device and production method thereof
05/31/2007WO2007060931A1 Nitride semiconductor device
05/31/2007WO2007060881A1 Method for manufacturing semiconductor device
05/31/2007WO2007060877A1 Transparent oxide semiconductor junction
05/31/2007WO2007060837A1 Method of manufacturing semiconductor device
05/31/2007WO2007060797A1 Semiconductor device and method for manufacturing same
05/31/2007WO2007060716A1 Trench gate power semiconductor device
05/31/2007WO2007060641A1 Method of fabricating self aligned schottky junctions for semiconductors devices
05/31/2007WO2007059734A1 Multi-fin component arrangement and method for producing a multi-fin component arrangement
05/31/2007WO2007059630A1 Multifunctional nanostructure and method
05/31/2007WO2007059551A1 Low area screen printed metal contact structure and method
05/31/2007WO2007043170A9 Soi trench lateral igbt
05/31/2007WO2007040845A3 A method of forming an oxide layer
05/31/2007WO2007001316A9 Monolithic vertical junction field effect transistor and schottky barrier diode fabricated from silicon carbide and method for fabricating the same
05/31/2007WO2006133129A3 Nano-scale self assembly in spinels induced by jahn-teller distortion
05/31/2007WO2006132795A3 A light-emitting device module with a substrate and methods of forming it
05/31/2007WO2006128181A3 Nanoparticle assemblies with molecular spring
05/31/2007WO2006119180A3 One time programmable read only memory
05/31/2007WO2006047382A3 Solderable top metal for sic device
05/31/2007WO2006009782A3 Persistent p-type group ii-vi semiconductors
05/31/2007WO2005045885A3 Anti-stiction technique for thin film and wafer-bonded encapsulated microelectromechanical systems
05/31/2007WO2005008723A3 Quantum coherent switch utilizing density wave (dw) material
05/31/2007US20070123062 Semiconductor device and method of manufacturing the same
05/31/2007US20070123050 Etch process used during the manufacture of a semiconductor device and systems including the semiconductor device
05/31/2007US20070123017 Device with self aligned gaps for capacitance reduction
05/31/2007US20070122990 Method for producing epitaxial wafer with buried diffusion layer and epitaxial wafer with buried diffusion layer
05/31/2007US20070122989 Epitaxial and polycrystalline growth of si1-x-ygexcy and si1-ycy alloy layers on si by uhv-cvd
05/31/2007US20070122983 Multi-operational mode transistor with multiple-channel device structure
05/31/2007US20070122980 Flash Memory Array with Increased Coupling Between Floating and Control Gates
05/31/2007US20070122979 Semiconductor devices and methods of fabricating the same
05/31/2007US20070122978 Non-volatile memory device and fabrication method thereof
05/31/2007US20070122974 Eeprom
05/31/2007US20070122970 Methods of fabricating memory devices with memory cell transistors having gate sidewall spacers with different dielectric properties
05/31/2007US20070122968 Fabrication method and structure for providing a recessed channel in a nonvolatile memory device
05/31/2007US20070122964 Semiconductor Device Equipped with a Voltage Step-Up Circuit
05/31/2007US20070122963 Latch-up prevention in semiconductor circuits
05/31/2007US20070122957 Low-cost feol for ultra-low power, near sub-vth device structures
05/31/2007US20070122953 Enhanced Segmented Channel MOS Transistor with High-Permittivity Dielectric Isolation Material
05/31/2007US20070122952 Semiconductor device with a dummy gate and a method of manufacturing a semiconductor device with a dummy gate
05/31/2007US20070122951 Self-aligned silicon carbide semiconductor devices and methods of making the same
05/31/2007US20070122946 Semiconductor device and method of manufacturing the same
05/31/2007US20070122939 Organic light emitting device
05/31/2007US20070122938 Organic electroluminescent display device
05/31/2007US20070122925 Flip-chip nitride light emitting device and method of manufacturing thereof
05/31/2007US20070121690 Highly efficient gallium nitride based light emitting diodes via surface roughening
05/31/2007US20070121385 Pattern layout of world line transfer transistors in nand flash memory which executes subblock erase
05/31/2007US20070121383 Behavior based programming of non-volatile memory
05/31/2007US20070121364 One-time programmable, non-volatile field effect devices and methods of making same
05/31/2007US20070121361 Semiconductor Memory Device, Electronic Card and Electronic Device
05/31/2007US20070120681 Semiconductor device
05/31/2007US20070120592 Semiconductor device with pump circuit
05/31/2007US20070120471 Display device and method for fabricating the same
05/31/2007US20070120266 Chip resistor
05/31/2007US20070120256 Reinforced interconnection structures
05/31/2007US20070120254 Semiconductor device comprising a pn-heterojunction
05/31/2007US20070120252 Nano-wire electronic device
05/31/2007US20070120251 Semiconductor wafer, semiconductor device and method of manufacturing the same, circuit board, and electronic equipment
05/31/2007US20070120226 Avalanche photodiode
05/31/2007US20070120225 Packaging having an array of embedded capacitors for power delivery and decoupling in the mid-frequency range and methods of forming thereof
05/31/2007US20070120224 Passivation structure with voltage equalizing loops
05/31/2007US20070120223 Circuit and method for suppression of electromagnetic coupling and switching noise in multilayer printed circuit boards
05/31/2007US20070120222 Method for manufacturing semiconductor silicon substrate and apparatus for manufacturing the same
05/31/2007US20070120221 Electronically Programmable Antifuse and Circuits Made Therewith
05/31/2007US20070120220 Methods of compensating for an alignment error during fabrication of structures on semiconductor substrates
05/31/2007US20070120219 Conductive layer, manufacturing method of the same, and signal transmission substrate
05/31/2007US20070120218 CMOS compatible shallow-trench efuse structure and method
05/31/2007US20070120217 Circuit Arrangement For Buck Converters And Method For Producing A Power Semiconductor Component
05/31/2007US20070120216 Low cost bonding pad and method of fabricating same
05/31/2007US20070120211 Magnetic elements with spin engineered insertion layers and MRAM devices using the magnetic elements
05/31/2007US20070120210 Spacer structure in MRAM cell and method of its fabrication
05/31/2007US20070120209 Magnetic field shaping conductor
05/31/2007US20070120208 Wide bandgap semiconductor based field effect transistors
05/31/2007US20070120207 Torsion spring for MEMS structure
05/31/2007US20070120206 Semiconductor optical device having current-confined structure
05/31/2007US20070120204 Semiconductor device and manufacturing method thereof
05/31/2007US20070120203 Semiconductor device and method for manufacturing the semiconductor devices
05/31/2007US20070120202 Semiconductor Integrated Circuit Device and Method of Testing the Same
05/31/2007US20070120201 Semiconductor device having super junction MOS transistor and method for manufacturing the same
05/31/2007US20070120200 MOS transistor having double gate and manufacturing method thereof
05/31/2007US20070120199 Low resistivity compound refractory metal silicides with high temperature stability
05/31/2007US20070120198 Latch-up prevention in semiconductor circuits
05/31/2007US20070120197 Method and structure for enhancing both nmosfet and pmosfet performance wth a stressed film
05/31/2007US20070120196 Prevention of latch-up among p-type semiconductor devices
05/31/2007US20070120195 Cmos circuits incorporating passive elements of low contact resistance, and methods of forming same
05/31/2007US20070120194 Semiconductor device and a method of manufacturing the same
05/31/2007US20070120189 Crystalline semiconductor thin film, method of fabricating the same, semiconductor device, and method of fabricating the same
05/31/2007US20070120187 Lateral soi semiconductor device
05/31/2007US20070120186 Engineered barrier layer and gate gap for transistors with negative differential resistance
05/31/2007US20070120185 Semiconductor device manufacturing method and semiconductor device
05/31/2007US20070120184 Enhanced resurf hvpmos device with stacked hetero-doping rim and gradual drift region
05/31/2007US20070120183 Integrated circuit devices having active regions with expanded effective widths
05/31/2007US20070120182 Transistor having recess gate structure and method for fabricating the same
05/31/2007US20070120181 Power IGBT with increased robustness
05/31/2007US20070120180 Transition areas for dense memory arrays
05/31/2007US20070120179 SONOS type non-volatile memory devices having a laminate blocking insulation layer and methods of manufacturing the same
05/31/2007US20070120178 Electrochemical cell structure and method of fabrication