Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
06/2007
06/19/2007US7232722 Method of making a multibit non-volatile memory
06/19/2007US7232720 Method for fabricating a semiconductor device having an insulation film with reduced water content
06/19/2007US7232716 Display device and method for manufacturing the same
06/19/2007US7232714 Semiconductor device
06/19/2007US7232698 Method for fabricating CMOS image sensor protecting low temperature oxide delamination
06/19/2007US7232697 Semiconductor device having enhanced photo sensitivity and method for manufacture thereof
06/14/2007WO2007067458A1 Self-aligned trench field effect transistors with regrown gates and bipolar junction transistors with regrown base contact regions and methods of making
06/14/2007WO2007067166A1 Metal oxide semiconductor devices and film structures and methods
06/14/2007WO2007066466A1 Organic semiconductor material, organic semiconductor film, organic semiconductor device and organic thin film transistor
06/14/2007WO2007065985A1 Transistor of the i-mos type comprising two independent gates and method of using such a transistor
06/14/2007WO2007065946A1 Isolation trench structure for high electric strength
06/14/2007WO2007065363A1 Materials for organic thin film transistors
06/14/2007WO2007042834A3 Power semiconductor devices
06/14/2007WO2007005999A3 Early contact, high cell density process
06/14/2007WO2006002129A3 Hybrid molecular electronic device for switching, memory, and sensor applications, and method of fabricating same
06/14/2007US20070135072 Wireless communication system
06/14/2007US20070134897 Process for producing schottky junction type semiconductor device
06/14/2007US20070134893 Method for fabricating image display device
06/14/2007US20070134884 Isolation method of defining active fins, method of fabricating semiconductor device using the same and semiconductor device fabricated thereby
06/14/2007US20070134879 Semiconductor device and method of manufacturing the same
06/14/2007US20070134875 Multi-level memory cell array with lateral floating spacers
06/14/2007US20070134864 Method and structure to create multiple device widths in finfet technology in both bulk and soi
06/14/2007US20070134860 Methods and Structures for Planar and Multiple-Gate Transistors Formed on SOI
06/14/2007US20070134836 Solid State Image Sensing Device and Manufacturing and Driving Methods Thereof
06/14/2007US20070134835 Switch using micro electro mechanical system
06/14/2007US20070134820 Semiconductor device and manufacturing method of the same
06/14/2007US20070134491 Metal nano-particles and method for preparing the same, dispersion of metal nano-particles and method for preparing the same, and thin metallic wire and metal film and method for preparing these substances
06/14/2007US20070133301 Low-voltage single-layer polysilicon eeprom memory cell
06/14/2007US20070133283 Nonvolatile Semiconductor Memory
06/14/2007US20070133282 Nonvolatile Semiconductor Memory
06/14/2007US20070132903 Method of manufacturing array substrate for liquid crystal display device
06/14/2007US20070132901 Liquid crystal display device and method of fabricating the same
06/14/2007US20070132377 Light emitting display device, method for manufacturing the same, and tv set
06/14/2007US20070132104 Semiconductor component having plate, stacked dice and conductive vias
06/14/2007US20070132097 Projected contact structures for engaging bumped semiconductor devices
06/14/2007US20070132065 Paraelectric thin film structure for high frequency tunable device and high frequency tunable device with the same
06/14/2007US20070132064 Stacked electrical resistor pad for optical fiber attachment
06/14/2007US20070132063 Integrated thin film capacitors with adhesion holes for the improvement of adhesion strength
06/14/2007US20070132062 Electronic apparatus interconnect routing and interconnect routing method for minimizing parasitic resistance
06/14/2007US20070132061 MIM capacitor in a copper damascene interconnect
06/14/2007US20070132060 Electronic component
06/14/2007US20070132059 Laser fuse with efficient heat dissipation
06/14/2007US20070132058 Adjuvant for controlling polishing selectivity and chemical mechanical polishing slurry comprising the same
06/14/2007US20070132057 Active region spacer for semiconductor devices and method to form the same
06/14/2007US20070132056 Isolation structures for semiconductor integrated circuit substrates and methods of forming the same
06/14/2007US20070132055 Semiconductor device and manufacturing method thereof
06/14/2007US20070132054 Memory cell having stressed layers
06/14/2007US20070132053 Integrated Circuit On Corrugated Substrate
06/14/2007US20070132048 Multi-Layer Device
06/14/2007US20070132047 Method for manufacturing a microelectromechanical component, and a microelectromechanical component
06/14/2007US20070132046 Nanotube based nonvolatile memory device and a method of fabricating and operating the same
06/14/2007US20070132045 Semiconductor dynamic sensor and method of manufacturing the same
06/14/2007US20070132044 Piezolectric micro electro-mechanical system switch, array of the switches, and method of fabricating the same
06/14/2007US20070132043 Nano-electronic sensors for chemical and biological analytes, including capacitance and bio-membrane devices
06/14/2007US20070132042 Passivation film of semiconductor device
06/14/2007US20070132041 Method for forming gate dielectric layers
06/14/2007US20070132040 Semiconductor device and method for manufacturing the same
06/14/2007US20070132039 Method and structure for strained FinFET devices
06/14/2007US20070132038 Embedded stressor structure and process
06/14/2007US20070132037 Semiconductor device having ohmic recessed electrode
06/14/2007US20070132036 Method of manufacturing semiconductor device
06/14/2007US20070132035 Transistor mobility improvement by adjusting stress in shallow trench isolation
06/14/2007US20070132034 Isolation body for semiconductor devices and method to form the same
06/14/2007US20070132033 High voltage CMOS devices
06/14/2007US20070132032 Selective stress relaxation of contact etch stop layer through layout design
06/14/2007US20070132031 Semiconductor device having stressors and method for forming
06/14/2007US20070132028 Semiconductor device and method of manufacturing the same
06/14/2007US20070132027 Transistor device containing carbon doped silicon in a recess next to MDD to create strain in channel
06/14/2007US20070132021 Semiconductor device and method of manufacturing the semiconductor device
06/14/2007US20070132020 Superjunction power MOSFET
06/14/2007US20070132019 DMOS transistor with optimized periphery structure
06/14/2007US20070132018 Semiconductor device and method for producing the same
06/14/2007US20070132017 Semiconductor device and manufacturing method of same
06/14/2007US20070132016 Trench ld structure
06/14/2007US20070132015 Semiconductor device and manufacturing method thereof
06/14/2007US20070132014 Trench insulated gate field effect transistor
06/14/2007US20070132013 High-voltage vertical transistor with a multi-gradient drain doping profile
06/14/2007US20070132012 Semiconductor device
06/14/2007US20070132011 Semiconductor device and method of fabricating the same background
06/14/2007US20070132010 Enhanced multi-bit non-volatile memory device with resonant tunnel barrier
06/14/2007US20070132009 Semiconductor device and method for producing the same
06/14/2007US20070132008 High voltage integration circuit with freewheeling diode embedded in transistor
06/14/2007US20070132007 Nonvolatile semiconductor memory and fabrication method for the same
06/14/2007US20070132006 Nonvolatile semiconductor memory and its manufacturing method
06/14/2007US20070132004 Nonvolatile semiconductor memory device
06/14/2007US20070132003 Semiconductor memory device
06/14/2007US20070132002 Method and structure of an one time programmable memory device in an embedded EEPROM
06/14/2007US20070132001 Non-volatile memory and manufacturing method and operating method thereof
06/14/2007US20070132000 Memory cell and method for manufacturing the same
06/14/2007US20070131999 Gated Diode Nonvolatile Memory Process
06/14/2007US20070131998 Vertical transistor device and fabrication method thereof
06/14/2007US20070131997 Semiconductor device and method for fabricating the same
06/14/2007US20070131996 Non-volatile memory device and fabricating method thereof
06/14/2007US20070131995 Reduced cell-to-cell shorting for memory arrays
06/14/2007US20070131994 Ferroelectric memory and method for manufacturing ferroelectric memory
06/14/2007US20070131986 Semiconductor device and method of manufacturing the same
06/14/2007US20070131985 Semiconductor device and method for manufacturing the same
06/14/2007US20070131984 Semiconductor device and method for fabricating the same
06/14/2007US20070131983 Tri-gate integration with embedded floating body memory cell using a high-K dual metal gate
06/14/2007US20070131982 Memory cell structure and method for fabricating the same
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