Patents
Patents for H01L 29 - Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. pn-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof (218,143)
10/2007
10/23/2007US7286204 Spacers for display devices
10/23/2007US7286173 Image sensor and image sensor integrated type active matrix type display device
10/23/2007US7285904 Organic EL display with an organic compound derivative layer
10/23/2007US7285902 Flat panel display with improved white balance
10/23/2007US7285867 Wiring structure on semiconductor substrate and method of fabricating the same
10/23/2007US7285866 Surface mounted package with die bottom spaced from support board
10/23/2007US7285865 Micro-package, multi-stack micro-package, and manufacturing method therefor
10/23/2007US7285864 Stack MCP
10/23/2007US7285863 Pad structures including insulating layers having a tapered surface
10/23/2007US7285859 Semiconductor device
10/23/2007US7285857 GaN-based III—V group compound semiconductor device and p-type electrode for the same
10/23/2007US7285854 Wire bonding method and semiconductor device
10/23/2007US7285850 Support elements for semiconductor devices with peripherally located bond pads
10/23/2007US7285840 Apparatus for confining inductively coupled surface currents
10/23/2007US7285839 Coating of copper and silver air bridge structures to improve electromigration resistance and other applications
10/23/2007US7285838 Semiconductor device and method of manufacturing the same
10/23/2007US7285836 Magnetic random access memory with stacked memory cells having oppositely-directed hard-axis biasing
10/23/2007US7285834 Process for producing microelectromechanical components and a housed microelectromechanical component
10/23/2007US7285833 Selective doping and thermal annealing method for forming a gate electrode pair with different work functions
10/23/2007US7285832 Multiport single transistor bit cell
10/23/2007US7285831 CMOS device with improved performance and method of fabricating the same
10/23/2007US7285830 Lateral bipolar junction transistor in CMOS flow
10/23/2007US7285829 Semiconductor device having a laterally modulated gate workfunction and method of fabrication
10/23/2007US7285826 High mobility CMOS circuits
10/23/2007US7285825 Element formation substrate for forming semiconductor device
10/23/2007US7285824 Semiconductor device having a lateral diode structure
10/23/2007US7285823 Superjunction semiconductor device structure
10/23/2007US7285822 Power MOS device
10/23/2007US7285821 Trench corner effect bidirectional flash memory cell
10/23/2007US7285820 Flash memory device using semiconductor fin and method thereof
10/23/2007US7285819 Nonvolatile storage array with continuous control gate employing hot carrier injection programming
10/23/2007US7285818 Non-volatile two-transistor programmable logic cell and array layout
10/23/2007US7285817 Semiconductor device
10/23/2007US7285816 Content addressable matrix memory cell
10/23/2007US7285815 EEPROM device having selecting transistors and method of fabricating the same
10/23/2007US7285812 Vertical transistors
10/23/2007US7285811 MRAM device for preventing electrical shorts during fabrication
10/23/2007US7285809 Thin film transistor having high mobility and high on-current
10/23/2007US7285808 Solid-state imaging device and method for manufacturing solid-state imaging device
10/23/2007US7285806 Semiconductor device having an active region formed from group III nitride
10/23/2007US7285805 Low reference voltage ESD protection device
10/23/2007US7285804 Thyristor-based SRAM
10/23/2007US7285799 Semiconductor light emitting devices including in-plane light emitting layers
10/23/2007US7285798 CMOS inverter constructions
10/23/2007US7285797 Image display apparatus without occurence of nonuniform display
10/23/2007US7285795 Vertical field-effect transistor, method of manufacturing the same, and display device having the same
10/23/2007US7285794 Quantum semiconductor device and method for fabricating the same
10/23/2007US7285500 Thin films and methods of making them
10/23/2007US7285482 Method for producing solid-state imaging device
10/23/2007US7285475 Integrated circuit having a device wafer with a diffused doped backside layer
10/23/2007US7285470 Method for the production of a bipolar semiconductor component, especially a bipolar transistor, and corresponding bipolar semiconductor component
10/23/2007US7285468 Methods of forming semiconductor constructions
10/23/2007US7285467 Methods of fabricating static random access memories (SRAMS) having vertical transistors
10/23/2007US7285466 Methods of forming metal oxide semiconductor (MOS) transistors having three dimensional channels
10/23/2007US7285465 Method of manufacturing a SiC vertical MOSFET
10/23/2007US7285464 Nonvolatile memory cell comprising a reduced height vertical diode
10/23/2007US7285461 Semiconductor device and method of manufacturing the same
10/23/2007US7285458 Method for forming an ESD protection circuit
10/23/2007US7285454 Bipolar transistors with low base resistance for CMOS integrated circuits
10/23/2007US7285449 Semiconductor device manufacture method including process of implanting impurity into gate electrode independently from source /drain and semiconductor device manufactured by the method
10/23/2007US7285446 Mounting structure of semiconductor chip, semiconductor device and method of making the semiconductor device
10/23/2007US7285441 Field effect transistor and method of manufacturing the same
10/23/2007US7285433 Integrated devices with optical and electrical isolation and method for making
10/23/2007US7285196 Methods and apparatus for making integrated-circuit wiring from copper, silver, gold, and other metals
10/23/2007US7284896 Light unit display
10/18/2007WO2007118060A2 Self-aligned complementary ldmos
10/18/2007WO2007118031A2 Silicon oxynitride gate dielectric formation using multiple annealing steps
10/18/2007WO2007118004A1 Semiconductor device with gate dielectric containing aluminum and mixed rare earth elements
10/18/2007WO2007117994A2 Process for reducing a size of a compact eeprom device
10/18/2007WO2007117991A1 Semiconductor device with gate dielectric containing mixed rare earth elements
10/18/2007WO2007117954A2 Power device with improved edge termination
10/18/2007WO2007117938A2 Charge balance techniques for power devices
10/18/2007WO2007117158A1 Zinc oxide materials and methods for their preparation
10/18/2007WO2007116982A1 Semiconductor device, and its manufacturing method
10/18/2007WO2007116964A1 Semiconductor device and its manufacturing method, dry etching method, method for preparing wiring material, and etching apparatus
10/18/2007WO2007116917A1 Production method for 3-d semiconductor device
10/18/2007WO2007116660A1 Organic thin film transistor device and method for manufacturing same
10/18/2007WO2007116517A1 Compound semiconductor structure and process for producing the same
10/18/2007WO2007116515A1 Semiconductor device, process for producing the same, method of dry etching, and process for fabricating wiring material
10/18/2007WO2007116492A1 Method for manufacturing semiconductor device
10/18/2007WO2007116470A1 Semiconductor device and process for producing the same
10/18/2007WO2007116420A1 Process for manufacturing a semiconductor power device and respective device
10/18/2007WO2007115954A1 Co-integration of multi-gate fet with other fet devices in cmos technology
10/18/2007WO2007115585A1 Method of forming a semiconductor device and semiconductor device
10/18/2007WO2007098138A3 Semiconductor device comprising a lattice matching layer and associated methods
10/18/2007WO2007081880A3 Method and apparatus for providing an integrated circuit having p and n doped gates
10/18/2007WO2007072405A3 Semiconductor device with recessed field plate and method of manufacturing the same
10/18/2007WO2007072305A3 Source and drain formation in silicon on insulator device
10/18/2007WO2007072304A3 Integrated high voltage diode and manufacturing method therefof
10/18/2007WO2007069151A3 Field effect transistor structure with an insulating layer at the junction
10/18/2007WO2007017803A3 Ldmos transistor
10/18/2007US20070243715 Cleaning solution and method for selectively removing layer in a silicidation process
10/18/2007US20070243689 Semiconductor device having semiconductor and base contact pad mesa portions
10/18/2007US20070243684 Semiconductor device and method of manufaturing the same
10/18/2007US20070243681 Method of fabricating flash memory device using sidewall process
10/18/2007US20070243672 Semiconductor device and method for fabricating the same
10/18/2007US20070243647 LED package and method for producing the same
10/18/2007US20070243646 LED package and method for producing the same
10/18/2007US20070243464 Nanotube Position Controlling Method, Nanotube Position Controlling Flow Path Pattern and Electronic Element Using Nanotube
10/18/2007US20070243414 Positive Electrode Structure and Gallium Nitride-Based Compound Semiconductor Light-Emitting Device