Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/2012
10/30/2012US8299542 MOSFET with multiple fully silicided gate and method for making the same
10/30/2012US8299541 Process for producing a contact pad on a region of an integrated circuit, in particular on the electrodes of a transistor
10/30/2012US8299540 High performance MOSFET
10/30/2012US8299538 Differential nitride pullback to create differential NFET to PFET divots for improved performance versus leakage
10/30/2012US8299537 Semiconductor-on-insulator substrate and structure including multiple order radio frequency harmonic supressing region
10/30/2012US8299536 Semiconductor device having transistors each having gate electrode of different metal ratio and production process thereof
10/30/2012US8299535 Delta monolayer dopants epitaxy for embedded source/drain silicide
10/30/2012US8299530 Structure and method to fabricate pFETS with superior GIDL by localizing workfunction
10/30/2012US8299529 Method for producing thin film transistor and thin film transistor
10/30/2012US8299525 Power IC device and method for manufacturing same
10/30/2012US8299514 High density integrated circuitry for semiconductor memory having memory cells with a minimum capable photolithographic feature dimension
10/30/2012US8299508 CMOS structure with multiple spacers
10/30/2012US8299502 Semiconductor heterostructures and manufacturing therof
10/30/2012US8299501 Nitride semiconductor device
10/30/2012US8299493 Semiconductor light emitting device and method of fabricating the same
10/30/2012US8299471 Organic electroluminescent device and fabrication method thereof
10/30/2012US8299470 Flat display device and method of manufacturing the same
10/30/2012US8299341 Fabrication of vertically aligned metallic nanopillars
10/30/2012US8298966 On-chip cooling systems for integrated circuits
10/30/2012US8298965 Volatile precursors for deposition of C-linked SiCOH dielectrics
10/30/2012US8298964 Method and apparatus providing air-gap insulation between adjacent conductors using nanoparticles
10/30/2012US8298962 Device made of single-crystal silicon
10/30/2012US8298961 Patterns of semiconductor device and method of forming the same
10/30/2012US8298960 Plasma etching method, control program and computer storage medium
10/30/2012US8298959 Method and apparatus for etching
10/30/2012US8298958 Organic line width roughness with H2 plasma treatment
10/30/2012US8298957 Plasma etchimg method and plasma etching apparatus
10/30/2012US8298956 Method for fabricating fine pattern
10/30/2012US8298955 Plasma etching method
10/30/2012US8298954 Sidewall image transfer process employing a cap material layer for a metal nitride layer
10/30/2012US8298953 Method for defining a separating structure within a semiconductor device
10/30/2012US8298952 Isolation structure and formation method thereof
10/30/2012US8298951 Footing reduction using etch-selective layer
10/30/2012US8298950 Method of etching sacrificial layer
10/30/2012US8298949 Profile and CD uniformity control by plasma oxidation treatment
10/30/2012US8298948 Capping of copper interconnect lines in integrated circuit devices
10/30/2012US8298947 Semiconductor device having solder-free gold bump contacts for stability in repeated temperature cycles
10/30/2012US8298946 Method of selective coating of a composite surface production of microelectronic interconnections using said method and integrated circuits
10/30/2012US8298945 Method of manufacturing substrates having asymmetric buildup layers
10/30/2012US8298944 Warpage control for die with protruding TSV tips during thermo-compressive bonding
10/30/2012US8298943 Self aligning via patterning
10/30/2012US8298942 Method for forming electric vias
10/30/2012US8298941 Method of manufacturing semiconductor device
10/30/2012US8298940 Semiconductor memory device and manufacturing method thereof
10/30/2012US8298939 Method for forming conductive contact
10/30/2012US8298938 Phase change memory cell structures and methods
10/30/2012US8298937 Interconnect structure fabricated without dry plasma etch processing
10/30/2012US8298936 Multistep method of depositing metal seed layers
10/30/2012US8298935 Dual damascene process
10/30/2012US8298934 Structure and method of creating entirely self-aligned metallic contacts
10/30/2012US8298933 Conformal films on semiconductor substrates
10/30/2012US8298932 Vertical interconnect structure, memory device and associated production method
10/30/2012US8298931 Dual damascene with amorphous carbon for 3D deep via/trench application
10/30/2012US8298929 Offset solder vias, methods of manufacturing and design structures
10/30/2012US8298928 Manufacturing method of a semiconductor device and method for creating a layout thereof
10/30/2012US8298927 Method of adjusting metal gate work function of NMOS device
10/30/2012US8298926 Silicon wafer with controlled distribution of embryos that become oxygen precipitates by succeeding annealing and its manufacturing method
10/30/2012US8298925 Mechanisms for forming ultra shallow junction
10/30/2012US8298924 Method for differential spacer removal by wet chemical etch process and device with differential spacer structure
10/30/2012US8298923 Germanium-containing release layer for transfer of a silicon layer to a substrate
10/30/2012US8298921 Semiconductor device and method of monitoring blowing of fuse in semiconductor device
10/30/2012US8298920 Chip ID applying method suitable for use in semiconductor integrated circuit
10/30/2012US8298919 Manufacturing method of semiconductor device and semiconductor device
10/30/2012US8298918 Method for forming semiconductor layer and method for manufacturing light emitting device
10/30/2012US8298916 Process for fabricating a multilayer structure with post-grinding trimming
10/30/2012US8298915 Method of transferring a circuit onto a ground plane
10/30/2012US8298914 3D integrated circuit device fabrication using interface wafer as permanent carrier
10/30/2012US8298913 Devices with gate-to-gate isolation structures and methods of manufacture
10/30/2012US8298912 Semiconductor structure and method of manufacturing same
10/30/2012US8298911 Methods of forming wiring structures
10/30/2012US8298910 Method of fabricating semiconductor device
10/30/2012US8298909 Semiconductor device and method for fabricating the same
10/30/2012US8298908 Structure and method for forming isolation and buried plate for trench capacitor
10/30/2012US8298907 Structure and method of forming enhanced array device isolation for implanted plate eDRAM
10/30/2012US8298906 Trench decoupling capacitor formed by RIE lag of through silicon via (TSV) etch
10/30/2012US8298905 Method for forming functional element using metal-to-insulator transition material, functional element formed by method, method for producing functional device, and functional device produced by method
10/30/2012US8298904 Compact thermally controlled thin film resistors utilizing substrate contacts and methods of manufacture
10/30/2012US8298903 Monitor pattern of semiconductor device and method of manufacturing semiconductor device
10/30/2012US8298902 Interconnect structures, methods for fabricating interconnect structures, and design structures for a radiofrequency integrated circuit
10/30/2012US8298901 Method for manufacturing bipolar transistors
10/30/2012US8298899 Semiconductor devices and methods of fabricating the same
10/30/2012US8298898 Manufacturing method of semiconductor device with increased drain breakdown voltage
10/30/2012US8298897 Asymmetric channel MOSFET
10/30/2012US8298896 Formation of a super steep retrograde channel
10/30/2012US8298895 Selective threshold voltage implants for long channel devices
10/30/2012US8298894 Work function adjustment in high-k metal gate electrode structures by selectively removing a barrier layer
10/30/2012US8298893 Method for manufacturing semiconductor device having multi-layered contact
10/30/2012US8298892 Fabricating method of insulator
10/30/2012US8298891 Resistive-switching memory element
10/30/2012US8298890 Charge blocking layers for nonvolatile memories
10/30/2012US8298889 Process of forming an electronic device including a trench and a conductive structure therein
10/30/2012US8298888 Creating integrated circuit capacitance from gate array structures
10/30/2012US8298887 High mobility monolithic p-i-n diodes
10/30/2012US8298886 Electronic device including doped regions between channel and drain regions and a process of forming the same
10/30/2012US8298885 Semiconductor device comprising metal gates and a silicon containing resistor formed on an isolation structure
10/30/2012US8298884 Method to reduce threshold voltage variability with through gate well implant
10/30/2012US8298883 Method of forming photoresist burr edge and method of manufacturing array substrate
10/30/2012US8298882 Metal gate and high-K dielectric devices with PFET channel SiGe
10/30/2012US8298881 Nanowire FET with trapezoid gate structure
10/30/2012US8298879 Methods of fabricating metal oxide or metal oxynitride TFTS using wet process for source-drain metal etch
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