Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
11/2012
11/22/2012US20120295440 Laser material removal methods and apparatus
11/22/2012US20120295439 Metal-Semiconductor Intermixed Regions
11/22/2012US20120295438 Copper interconnection, method for forming copper interconnection structure, and semiconductor device
11/22/2012US20120295437 Method for fabricating through-silicon via structure
11/22/2012US20120295436 Formation of a zinc passivation layer on titanium or titanium alloys used in semiconductor processing
11/22/2012US20120295435 Pattern transfer method
11/22/2012US20120295434 Solder collapse free bumping process of semiconductor device
11/22/2012US20120295433 Esd/antenna diodes for through-silicon vias
11/22/2012US20120295432 Method of forming semiconductor device
11/22/2012US20120295431 Method for etching gate stack
11/22/2012US20120295430 Method for processing a substrate having a non-planar substrate surface
11/22/2012US20120295429 Substrate processing apparatus, substrate processing method, and method of manufacturing semiconductor device
11/22/2012US20120295428 Methods for pretreatment of group iii-nitride depositions
11/22/2012US20120295427 High throughput cyclical epitaxial deposition and etch process
11/22/2012US20120295426 Cmos with channel p-finfet and channel n-finfet having different crystalline orientations and parallel fins
11/22/2012US20120295425 Methods of fabricating devices by low pressure cold welding
11/22/2012US20120295424 Method for designing soi wafer and method for manufacturing soi wafer
11/22/2012US20120295423 Graphene based three-dimensional integrated circuit device
11/22/2012US20120295422 METHOD FOR FABRICATING InGaN-BASED MULTI-QUANTUM WELL LAYERS
11/22/2012US20120295421 Low temperature selective epitaxy of silicon germanium alloys employing cyclic deposit and etch
11/22/2012US20120295420 Semiconductor devices with reduced sti topography by using chemical oxide removal
11/22/2012US20120295419 Methods for depositing a material atop a substrate
11/22/2012US20120295418 Methods for improved growth of group iii nitride buffer layers
11/22/2012US20120295417 Selective epitaxial growth by incubation time engineering
11/22/2012US20120295416 Adhesive sheet for producing semiconductor device
11/22/2012US20120295415 Method of manufacturing semiconductor device
11/22/2012US20120295414 Methods for producing stacked electrostatic discharge clamps
11/22/2012US20120295413 Method of manufacturing non-volatile semiconductor memory element and method of manufacturing non-volatile semiconductor memory device
11/22/2012US20120295412 Method for manufacturing semiconductor device
11/22/2012US20120295411 Closed cell trench power mosfet structure and method to fabricate the same
11/22/2012US20120295410 Method for fabricating super-junction power device with reduced miller capacitance
11/22/2012US20120295409 Methods of fabricating three-dimensional semiconductor memory devices
11/22/2012US20120295408 Method for manufacturing memory device
11/22/2012US20120295407 Thin film transistor and method of manufacturing the same
11/22/2012US20120295406 Carbon nanotube dispersion liquid and method for manufacturing semiconductor device
11/22/2012US20120295405 Methods for vacuum assisted underfilling
11/22/2012US20120295404 Method of manufacturing semiconductor package
11/22/2012US20120295403 Fabrication method of embedded chip substrate
11/22/2012US20120295402 Semiconductor device, method of manufacturing the semiconductor device, flip chip package having the semiconductor device and method of manufacturing the flip chip package
11/22/2012US20120295401 Methods for forming assemblies and multi chip modules including stacked semiconductor dice
11/22/2012US20120295400 Method for producing semiconductor chip with adhesive film, adhesive film for semiconductor used in the method, and method for producing semiconductor device
11/22/2012US20120295399 Oxide-based thin film transistor, method of fabricating the same, zinc oxide etchant, and a method of forming the same
11/22/2012US20120295397 Method for manufacturing semiconductor device
11/22/2012US20120295384 Temperature Stable MEMS Resonator
11/22/2012US20120295375 Peeling method and method for manufacturing display device using the peeling method
11/22/2012US20120295374 Light emitting device, package, light emitting device manufacturing method, package manufacturing method and package manufacturing die
11/22/2012US20120295371 Process for Reconditioning Semiconductor Surface to Facilitate Bonding
11/22/2012US20120295370 Magnetic random access memory (mram) with enhanced magnetic stiffness and method of making same
11/22/2012US20120295074 Arrays of long nanostructures in semiconductor materials and methods thereof
11/22/2012US20120295029 Methods utilizing scanning probe microscope tips and products therefor or produced thereby
11/22/2012US20120294564 Silicon acousto-optic modulator structure and method
11/22/2012US20120294077 Spin torque transfer memory cell structures and methods
11/22/2012US20120293973 Multilayered wiring board and method for fabricating the same
11/22/2012US20120293972 Integrated Voltage Regulator Method with Embedded Passive Device(s)
11/22/2012US20120293964 Power electronic module with non-linear resistive field grading and method for its manufacturing
11/22/2012US20120293586 Enhancing superoleophobicity and reducing adhesion through multi-scale roughness by ald/cvd technique in inkjet application
11/22/2012US20120293191 HVMOS Reliability Evaluation using Bulk Resistances as Indices
11/22/2012US20120293189 Novel method and device for whole-cell bacterial bio-capacitor chip for detecting cellular stress induced by toxic chemicals
11/22/2012US20120292789 Semiconductor wafer and method of producing the same
11/22/2012US20120292788 Chip stacking
11/22/2012US20120292785 Semiconductor Device and Method of Mounting Die with TSV in Cavity of Substrate for Electrical Interconnect of FI-POP
11/22/2012US20120292781 Integrated circuit package
11/22/2012US20120292780 Package structure and manufacturing method thereof
11/22/2012US20120292779 Semiconductor structure having offset passivation to reduce electromigration
11/22/2012US20120292778 Embedded semiconductor power modules and packages
11/22/2012US20120292777 Backside Power Delivery Using Die Stacking
11/22/2012US20120292775 Mounting method and mounting device
11/22/2012US20120292773 Method for Producing a Metal Layer on a Substrate and Device
11/22/2012US20120292770 Method and device for preventing corrosion on sensors
11/22/2012US20120292767 Novel Approach for Reducing Copper Line Resistivity
11/22/2012US20120292766 Semiconductor structure and manufacturing method of the same
11/22/2012US20120292763 Electromigration immune through-substrate vias
11/22/2012US20120292762 Package structure and manufacturing method thereof
11/22/2012US20120292760 Semiconductor device and method of manufacturing the same
11/22/2012US20120292757 Semiconductor component and method of manufacturing a semiconductor component
11/22/2012US20120292756 Semiconductor device with heat spreader
11/22/2012US20120292755 Flank wettable semiconductor device
11/22/2012US20120292752 Thermally Enhanced Semiconductor Package with Exposed Parallel Conductive Clip
11/22/2012US20120292751 Semiconductor Device and Method of Forming Holes in Substrate to Interconnect Top Shield and Ground Shield
11/22/2012US20120292750 Integrated circuit package system with internal stacking module
11/22/2012US20120292748 Methods and structures for forming integrated semiconductor structures
11/22/2012US20120292745 Semiconductor Device and Method of Forming 3D Semiconductor Package with Semiconductor Die Stacked Over Semiconductor Wafer
11/22/2012US20120292744 Chip package, method for forming the same, and package wafer
11/22/2012US20120292740 High voltage resistance semiconductor device and method of manufacturing a high voltage resistance semiconductor device
11/22/2012US20120292739 Integrated circuit having silicon resistor and method of forming the same
11/22/2012US20120292735 Corner transistor suppression
11/22/2012US20120292734 Semiconductor devices having encapsulated isolation regions and related fabrication methods
11/22/2012US20120292733 Mixed Schottky/P-N Junction Diode and Method of Making
11/22/2012US20120292732 Semiconductor diode and method of manufacture
11/22/2012US20120292722 Package structure having mems elements and fabrication method thereof
11/22/2012US20120292721 Semiconductor device and method of fabricating the same
11/22/2012US20120292720 Metal gate structure and manufacturing method thereof
11/22/2012US20120292719 High-k metal gate device
11/22/2012US20120292716 Dram structure with buried word lines and fabrication thereof, and ic structure and fabrication thereof
11/22/2012US20120292711 Semiconductor structure and method for forming the same
11/22/2012US20120292710 Method for self-aligned metal gate cmos
11/22/2012US20120292708 Combined Substrate High-K Metal Gate Device and Oxide-Polysilicon Gate Device, and Process of Fabricating Same
11/22/2012US20120292707 Nano-electro-mechanical system (nems) structures on bulk substrates
11/22/2012US20120292704 Barrier trench structure and methods of manufacture
11/22/2012US20120292700 Extremely Thin Semiconductor-On-Insulator (ETSOI) FET With A Back Gate and Reduced Parasitic Capacitance And Method of Forming The Same
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