Patents
Sitemap › H01 - Basic electric elements › H01L - Semiconductor devices; Electric solid state devices not otherwise provided for › H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
10/1991
10/22/1991US5058491 Building and method for manufacture of integrated circuits
10/22/1991US5058328 Wafer centering assembly
10/22/1991CA1291214C Clock monitor for use with vlsi chips
10/21/1991WO1991016747A1 High power laser diode
10/19/1991CA2037705A1 Method and apparatus for enhancing the depth of focus in projection lithography
10/17/1991WO1991015881A1 Integrated circuit adapter having gullwing-shaped leads
10/17/1991WO1991015874A1 Cold cathode field emission device having integral control or controlled non-fed devices
10/17/1991WO1991015853A1 Very high density wafer scale device architecture
10/17/1991WO1991015852A1 Dynamic ram in which timing of end of data read out is earlier than conventional
10/17/1991WO1991015361A1 METHOD FOR OBTAINING GaAs FLAT SURFACES
10/17/1991WO1991015333A2 Ultrafast electro-dynamic x, y and theta positioning stage
10/17/1991WO1991013462A3 Methods of forming electronic packages
10/17/1991WO1991009995A3 Process for the deposition of thin films on solids
10/17/1991WO1991008095A3 Single-strip moulding apparatus
10/17/1991DE4112072A1 Metal insulated semiconductor transistor - has offset zone partially overlapped by double offset zone of opposite type
10/17/1991DE4112045A1 Semiconductor component e.g. MOS LDD type transistor - has element separating insulating layer which surrounds active region at peripherally identical height on main substrate surface
10/17/1991DE4110896A1 Detecting redundant circuit in logic circuit - detecting coincidence between results of simulations with and without pseudo-errors
10/17/1991DE4107165A1 Single transistor semiconductor memory cell - includes capacitor with ferroelectric layer between opposing electrodes
10/17/1991DE4018449C1 Low temp. prodn. of anhydrous silicon di:oxide layer - comprises polymerising silicon-oxygen organic cpd. with oxygen or nitrogen oxide gas, depositing, converting to silicate etc.
10/17/1991DE4012080A1 Verfahren zum aufbau von mikromechanischen sensoren A method for building of micro-mechanical sensors
10/17/1991DE4011993A1 Single-sided polished semiconductor disc mfg. system - uses upper and lower polishing surfaces for polishing opposing pairs of discs
10/17/1991DE4011580A1 Material, esp. micro-capacitor dielectric prodn. - by melting metal film to form particles between insulating layer and deposition steps
10/16/1991EP0452222A1 Electrostatic substrat holder
10/16/1991EP0452091A2 Electrically programmable antifuse element and method of forming it
10/16/1991EP0452054A1 HEMT structure with passivated structure
10/16/1991EP0452043A1 X-ray mask structure
10/16/1991EP0452041A1 Substrate conveying device and method of controlling the same
10/16/1991EP0452035A1 Semiconductor variable capacitance diode
10/16/1991EP0451993A2 Method for preparing a substrate for semiconductor devices
10/16/1991EP0451973A2 A transistor logical circuit
10/16/1991EP0451968A1 Process for manufacturing thin film transistor
10/16/1991EP0451943A2 Plasma processing method and apparatus
10/16/1991EP0451907A1 Method of irradiating an object by means of a charged particle beam, and device for performing the method
10/16/1991EP0451904A1 A semiconductor device
10/16/1991EP0451883A1 Process for the accomplishment of an ROM memory cell having a low drain capacity
10/16/1991EP0451870A2 Reference voltage generating circuit
10/16/1991EP0451856A1 Solid-state image sensing device
10/16/1991EP0451855A1 Method of manufacturing an epitaxial wafer
10/16/1991EP0451850A1 Positive photoresist composition
10/16/1991EP0451803A1 Conductive polysulfone resin composition and high-heat-resistant, conductive semi-conductor article molded from same
10/16/1991EP0451789A1 Method of forming semiconductor thin film
10/16/1991EP0451777A2 Plasma etching apparatus with accurate temperature and voltage level control on device under test
10/16/1991EP0451740A2 Temperature control system for semiconductor wafer or substrate
10/16/1991EP0451644A1 An improved metallization system for reduced corrosion susceptibility
10/16/1991EP0451632A2 Semiconductor structure and method of its manufacture
10/16/1991EP0451571A2 Sputtering process for forming aluminum layer over stepped semiconductor wafer
10/16/1991EP0451561A1 Photopolymerisable mixture and recording material made from it
10/16/1991EP0451553A2 Self-aligned silicided base bipolar transistor and resistor and method of fabrication
10/16/1991EP0451514A2 Measurement of conductive layers of a semiconductor wafer
10/16/1991EP0451502A1 Metal-metal epitaxy on substrates
10/16/1991EP0451454A2 Semiconductor device having element regions being electrically isolated from each other
10/16/1991EP0451423A1 Vertical isolated-collector PNP transistor structure
10/16/1991EP0451389A1 Nonvolatile semiconductor memory and method of making same
10/16/1991EP0451363A1 Tape-automated bonding frame adapter system
10/16/1991EP0451351A1 Method for direct heating of a substrate holder
10/16/1991EP0451311A1 Process for obtaining a resist pattern
10/16/1991EP0451307A1 Phase mask for photolithographic projection and process for its preparation
10/16/1991EP0451286A1 Integrated circuit device
10/16/1991EP0451247A1 Method and apparatus relating to ion implantation.
10/16/1991CN2086937U Bolt-type internally pressure-welded crystal thyratron
10/16/1991CN1055436A Integrated circuit for analog system
10/16/1991CN1055350A Method for reducing shrinkage during firing of green ceramic bodies
10/16/1991CN1014380B Method of fabricating semiconductor device with reduced packaging stress
10/16/1991CN1014379B Method for making screw bolt-type thyristor
10/16/1991CN1014359B Test method for lcd elements
10/16/1991CA2039913A1 Vapour effusion source for epitaxial deposition plants
10/15/1991US5058058 Structure for sense amplifier arrangement in semiconductor memory device
10/15/1991US5057969 Thin film electronic device
10/15/1991US5057907 Method and structure for forming vertical semiconductor interconnection
10/15/1991US5057904 Socket unit for package having pins and pads
10/15/1991US5057902 Self-aligned semiconductor devices
10/15/1991US5057899 Semiconductor device with improved wiring contact portion
10/15/1991US5057898 Double-gated semiconductor memory device
10/15/1991US5057897 Charge neutralization using silicon-enriched oxide layer
10/15/1991US5057896 Semiconductor device and method of producing same
10/15/1991US5057894 Semiconductor integrated circuit device
10/15/1991US5057887 High density dynamic ram cell
10/15/1991US5057883 Permeable base transistor with gate fingers
10/15/1991US5057880 Semiconductor device having a heteroepitaxial substrate
10/15/1991US5057878 Insulator of organic material
10/15/1991US5057805 Microwave semiconductor device
10/15/1991US5057721 Level shift circuit for controlling a driving circuit
10/15/1991US5057720 Output buffering H-bridge circuit
10/15/1991US5057714 BiCMOS integrated circuit device utilizing Schottky diodes
10/15/1991US5057704 Semiconductor integrated circuit having substrate potential detecting circuit commonly used
10/15/1991US5057668 Device for the implementation of a curing process at a semiconductor wafer and method for curing a semiconductor wafer
10/15/1991US5057463 Thin oxide structure and method
10/15/1991US5057462 Compensation of lithographic and etch proximity effects
10/15/1991US5057461 Method of mounting integrated circuit interconnect leads releasably on film
10/15/1991US5057460 Method of making an electronic module, for insertion into an electronic memory-card body
10/15/1991US5057458 Combination of a support and a semiconductor body and method of manufacturing such a combination
10/15/1991US5057457 Sealed by inner resin, enclosed by outer resin containing wax
10/15/1991US5057456 Method of manufacturing a tab semiconductor package by securing a thin insulating frame to inner leads of the package
10/15/1991US5057455 Formation of integrated circuit electrodes
10/15/1991US5057454 Thin alloy film of gold and beryllium and metal film of nickel, chromium, molybdenum or platinum; heat treatment
10/15/1991US5057453 Method for making a semiconductor bump electrode with a skirt
10/15/1991US5057452 Mulitlayer; silicon substrate, silicon dioxide covering containing openings; heat treatment
10/15/1991US5057450 Method for fabricating silicon-on-insulator structures
10/15/1991US5057449 Process for creating two thicknesses of gate oxide within a dynamic random access memory
10/15/1991US5057448 Method of making a semiconductor device having DRAM cells and floating gate memory cells
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