Patents
Patents for H01L 21 - Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof (658,974)
04/2008
04/03/2008US20080078990 Copolymer, composition for forming banks, and method for forming banks using the composition
04/03/2008US20080078988 Strained Si/SiGe/SOI islands and processes of making same
04/03/2008US20080078987 UV-assisted dielectric formation for devices with strained germanium-containing layers
04/03/2008US20080078948 Processing termination detection method and apparatus
04/03/2008US20080078746 Substrate processing system, gas supply unit, method of substrate processing, computer program, and storage medium
04/03/2008US20080078745 RF Coil Plasma Generation
04/03/2008US20080078744 High chamber temperature process and chamber design for photo-resist stripping and post-metal etch passivation
04/03/2008US20080078505 Plasma etching apparatus and plasma etching method
04/03/2008US20080078504 Self-Calibrating Optical Emission Spectroscopy for Plasma Monitoring
04/03/2008US20080078503 Mechanical pump operating well for a long term and method of manufacturing the same
04/03/2008US20080078441 Semiconductor devices and methods from group iv nanoparticle materials
04/03/2008US20080078428 Substrate processing apparatus
04/03/2008US20080078426 Substrate processing apparatus and substrate processing method
04/03/2008US20080078423 Substrate processing method and substrate processing apparatus
04/03/2008US20080078326 Pre-cleaning tool and semiconductor processing apparatus using the same
04/03/2008US20080078239 Semiconductor probe having wedge shape resistive tip and method of fabricating the same
04/03/2008DE19901426B4 Mehrkammersystem einer Ätzeinrichtung zur Herstellung von Halbleiterbauelementen A multi-chamber system of an etching apparatus for the production of semiconductor devices
04/03/2008DE19816309B4 Verfahren zur Direktmontage von Silizium-Sensoren und danach hergestellte Sensoren A method for direct mounting of silicon sensors and subsequently manufactured sensors
04/03/2008DE19809554B4 Siliziumkarbidhalbleitervorrichtung Silicon carbide semiconductor device
04/03/2008DE19730993B4 Vakuumbeschichtungsvorrichtung zum allseitigen Beschichten von Substraten durch Rotation der Substrate im Partikelstrom Vacuum coater for coating substrates on all sides by rotating the substrates in the particle flow
04/03/2008DE112006000654T5 Freitragendes Substrat, Verfahren zur Herstellung desselben und Halbleiterleuchtvorrichtung Of the same self-supporting substrate, methods for making and semiconductor light-emitting device
04/03/2008DE10392705B4 Verfahren zur Musterprüfung Method for pattern inspection
04/03/2008DE10344038B4 Junction-Feldeffekttransistor Junction field-effect transistor
04/03/2008DE10335078B4 Verfahren zur Herstellung eines Bauelements mit einem formgebend umhüllten Leadframe und Bauelement mit einem formgebend umhüllten Leadframe A method for producing a component with a shaping coated leadframe and a component with a shaping coated leadframe
04/03/2008DE10328008B4 Integrierte Schaltungsanordnung mit pnp- und npn-Bipolartransistoren sowie Herstellungsverfahren An integrated circuit device with PNP and NPN bipolar transistors and manufacturing processes
04/03/2008DE10317601B4 Verfahren zum Herstellen eines Vertikalen DRAM-Bauelements A method of manufacturing a vertical DRAM device
04/03/2008DE10317096B4 Verfahren zur Herstellung von komplementären bipolaren Transistoren mit SiGe-Basisregionen A process for producing complementary bipolar transistors with SiGe base regions
04/03/2008DE10229182B4 Verfahren zur Herstellung einer gestapelten Chip-Packung A process for producing a stacked chip package
04/03/2008DE102007045854A1 Contact-free transport device for holding work piece by pressure fluid and transporting in contact-free condition, has bodies with passage which is supplied by air supply area, and retaining surface is formed at end of body
04/03/2008DE102007044207A1 Schnittstellenvorrichtung für Prüfvorrichtung für elektronische Bauelemente An interface device for electronic device testing apparatus
04/03/2008DE102007043709A1 Power-Via-Struktur zur Integration in Advanced-Logic/Smart-Power-Technologien Power-via structure for integration in Advanced Logic / smart power technologies
04/03/2008DE102007043336A1 Verfahren und Vorrichtung zum Reduzieren von Plasma-induzierter Beschädigung in einer Halbleiteranordnung Method and apparatus for reducing plasma-induced damage in a semiconductor device
04/03/2008DE102007039203A1 Wafer-Zerteilungsverfahren Wafer dicing
04/03/2008DE102007035766A1 Resiststruktur-Verdickungsmarerial, Verfahren zum Ausbilden einer Resiststruktur, Halbleitervorrichtung und Verfahren zum Herstellen derselben Verdickungsmarerial resist pattern, A method of forming a resist pattern, the semiconductor device and method of manufacturing the same
04/03/2008DE102007032775A1 Leistungsverstärker Power amplifier
04/03/2008DE102007004302A1 Semiconductor chip for light emitting diode, has support with two support surfaces, and semiconductor layer sequence has active area for generation of radiation
04/03/2008DE102006053435A1 Speicherzellenanordnungen und Verfahren zum Herstellen von Speicherzellenanordnungen Memory cell arrays and methods of manufacturing of memory cell arrays
04/03/2008DE102006049158A1 Transistor, Speicherzellenfeld und Verfahren zur Herstellung eines Transistors Transistor, memory cell array and method of manufacturing a transistor
04/03/2008DE102006048877B3 Method for forming semiconductor memory device e.g. not-and (NAND) type flash memory device involves filling interspaces with planarizing layer of dielectric material, and removing remaining portions of sacrificial layer
04/03/2008DE102006046869A1 Vertical semiconductor device i.e. vertical double-diffused metal oxide semiconductor power transistor, manufacturing method, involves producing trench in front side, and using trench as thickness-criterion for controlling wafer thinning
04/03/2008DE102006046853A1 Semiconductor component has semiconductor body with cell field area, and trenches lie in transient area between depth of body region and depth of cell field area on surface of semiconductor body
04/03/2008DE102006046851A1 Chip comprises contact element for electrical contact of chip, where contact element is covered with organic layer
04/03/2008DE102006046789A1 Electronic component e.g. isolated gate bipolar transistor, has layer region that is electrically conductively arranged at thinned wafers, where layer thickness of layer region is larger than specific micrometers
04/03/2008DE102006046788A1 Method for manufacturing semiconductor circuit arrangement, involves preparing semiconductor substrate and implementing processing on back side of semiconductor substrate
04/03/2008DE102006046770A1 Module for producing assembly from module and other compound component, has multiple markers with code reading by read device for co-ordinate axis of co-ordinate system assigned to marker
04/03/2008DE102006046678A1 Housing for use with semiconductor body of e.g. LED unit, has plastic-base body with plastic components, where one plastic component is made of material differing from that of other component in optical characteristic
04/03/2008DE102006046381A1 Method for reducing lacquer poisoning during structuring of strutted nitrogen-containing layers in semiconductor component, involves forming stressed layer by two transistors, where stressed layer has silicon and nitrogen
04/03/2008DE102006046380A1 Field-effect transistor e.g. P-type field-effect transistor, forming method, involves filling recess in substrate with semiconductor material that includes lattice constant, and forming gate electrode over filled recess
04/03/2008DE102006046377A1 Semiconductor device e.g. integrated circuit, has active semiconductor regions with peripheries formed by isolation trenches with dielectric filling materials, respectively, where filling materials are comprised of silicon nitride
04/03/2008DE102006046376A1 Method for building metal silicide in component field of semiconductor component, involves producing reaction temperature by irradiating component field by radiation of specified wavelength range
04/03/2008DE102006046375A1 Method for forming dielectric layer on transistor with gate electrode, includes dielectric layer, which has pre-determined inner bracing and formed place holder structure on gate electrode, to increase component height on gate electrode
04/03/2008DE102006046374A1 Lacquer contamination reducing method, involves forming lacquer mask, which unseals area of deformation induced layer, over layer to cover one transistor, and removing unsealed area of layer from area over another transistor
04/03/2008DE102006046364A1 Anti-reflection coating producing method for manufacturing semiconductor device i.e. integrated circuit, involves performing sputter-cleaning process on part of intermediate undercoating before removal of barrier material in opening
04/03/2008DE102006046363A1 Method for building gate electrode on primary crystalline semiconductor layer, involves defining longitudinal direction by gate electrode and implementing amorphization implantation process for building amorphization field
04/03/2008DE102006045866A1 Halte- und Drehvorrichtung für berührungsempfindliche ebene Objekte Holding and rotating device for touch-sensitive flat objects
04/03/2008DE102006045834A1 Verfahren zum Herstellen eines Halbleitermaterials A method of manufacturing a semiconductor material
04/03/2008DE102006045441A1 Verfahren zur Herstellung einer Halbleiterbauelementanordnung mit einer Trenchtransistorstruktur A method of manufacturing a semiconductor device assembly comprising a trench transistor structure
04/03/2008DE102006045125A1 Three dimensional polysilicon structure producing method for formation of e.g. complementary metal oxide semiconductor memory device, involves structuring base layer for forming upper layer of polysilicon structure
04/03/2008DE102006044840A1 Integrated transistor device has semiconductor substrate, where column is formed in semiconductor substrate, and source or drain area is formed within upper area of column
04/03/2008DE102006044836A1 Shielding unit and heat dissipation unit combined module, has shielding unit provided on principal surface of high frequency chip, by bond and comprising welding contact, where shielding unit is arranged in vicinity of chip
04/03/2008DE102006044367A1 Verfahren zum Polieren einer Halbleiterscheibe und eine nach dem Verfahren herstellbare polierte Halbleiterscheibe A method of polishing a semiconductor wafer and a manufacturable by the method polished semiconductor wafer
04/03/2008DE102006044366A1 Simultaneous cutting of disks from a cylindrical workpiece by saw wires measures the density of the abrasive suspension in the tank, for replacement when at a threshold level
04/03/2008DE102006042026A1 Vorrichtung zum Halten eines Substrats An apparatus for holding a substrate
04/03/2008DE102006020823B4 Verfahren zur Herstellung einer polierten Halbleiterscheibe A process for producing a polished wafer
04/03/2008DE102006006782B4 Verfahren zum Behandeln von Designfehlern eines Layouts einer integrierten Schaltung A method for treating errors of a design layout of an integrated circuit
04/03/2008DE102006005679B4 Halbleiterbauelement mit einer Transistorstruktur und Verfahren zur Herstellung desselben Of the same semiconductor device having a transistor structure and process for preparing
04/03/2008DE102005061785B4 Verfahren und Vorrichtung zum Erkennen von Rissen in Silizium-Wafern Method and apparatus for detecting cracks in silicon wafers
04/03/2008DE102005047054B4 Leistungs-MOS-Transistor mit einer SiC-Driftzone und Verfahren zur Herstellung eines Leistungs-MOS-Transistors A power MOS transistor having a SiC drift zone and process for producing a power MOS transistor
04/03/2008DE102004039059B4 Verfahren und Vorrichtung zum Reinigen von Halbleitersubsstraten Method and apparatus for cleaning Halbleitersubsstraten
04/03/2008DE102004037191B4 Halbleiterbautelement mit einer Passivierungsschicht und Verfahren zu seiner Herstellung Halbleiterbautelement with a passivation layer and process for its preparation
04/03/2008DE102004009600B4 Selbstorganisierende organische Dielektrikumsschichten auf der Basis von Phosphonsäure-Derivaten Self-organizing organic dielectric layers on the basis of phosphonic acid derivatives
04/03/2008DE10123758B4 Multi-Chip-Modul mit mehreren integrierten Halbleiterschaltungen Multi-chip module having a plurality of semiconductor integrated circuits
04/03/2008DE10084995B4 Verfahren und Vorrichtung zum Bilden einer Struktur unterhalb einer Bondmetallisierung Method and apparatus for forming a structure beneath a Bondmetallisierung
04/03/2008DE10033013B4 Flüssigkeits-Spritzpresssystem zum Vergießen von integrierten Halbleiterschaltungen und Verfahren zum Vergießen von integrierten Halbleiterschaltungen Liquid molding system for encapsulating semiconductor integrated circuits and methods for encapsulating semiconductor integrated circuits
04/03/2008DE10014195B4 Halbleiterspeicherbauelement und Herstellungsverfahren hierfür The semiconductor memory device and manufacturing method thereof
04/02/2008EP1906457A1 Method of Manufacturing Tandem Thin-Film Solar Cell
04/02/2008EP1906456A1 Method of manufacturing tandem thin-film solar cell
04/02/2008EP1906452A1 Semiconductor device and method for manufacturing same
04/02/2008EP1906450A1 Process for producing simox substrate, and simox substrate produced by said process
04/02/2008EP1906449A1 Semiconductor device and electric device
04/02/2008EP1906446A2 Semiconductor device and manufacturing method thereof
04/02/2008EP1906444A2 Gettering device for ion capture
04/02/2008EP1906442A2 Fabrication of a wiring pattern and of an active matrix substrate
04/02/2008EP1906441A1 Wafer with semiconductor devices and method of manufacturing the same
04/02/2008EP1906440A1 Semiconductor device
04/02/2008EP1906439A2 Etching method and semiconductor device fabrication method
04/02/2008EP1906438A1 Method for cutting workpiece
04/02/2008EP1906437A1 Exposure method, exposure device, and device manufacturing method
04/02/2008EP1906189A1 Method of manufacturing a probe card
04/02/2008EP1905532A1 Method of manufacturing parts by laser using an adhesive having an extinction coefficient at a wavelength of 532 nm of 20 cm-1 or more
04/02/2008EP1905097A2 Nitride-based transistors and fabrication methods with an etch stop layer
04/02/2008EP1905092A1 Semiconductor device including a strained superlattice between at least one pair of spaced apart stress regions and associated methods
04/02/2008EP1905091A1 Semiconductor device including a strained superlattice and overlying stress layer and related methods
04/02/2008EP1905090A1 Semiconductor device including a strained superlattice layer above a stress layer and associated methods
04/02/2008EP1905089A1 Semiconductor device and a method for production thereof
04/02/2008EP1905088A2 Packaging technique for the fabrication of polarized light emitting diodes
04/02/2008EP1905082A1 Power interconnect structure for balanced bitline capacitance in a memory array
04/02/2008EP1905075A2 Semiconductor device and method for manufacturing a semiconductor device
04/02/2008EP1905074A2 High performance capacitors in planar back gates cmos
04/02/2008EP1905073A1 Semiconductor device and wireless communication system