| Patents for G11C 7 - Arrangements for writing information into, or reading information out from, a digital store (53,197) |
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| 03/04/2008 | US7339408 Generating multi-phase clock signals using hierarchical delays |
| 03/04/2008 | US7339226 Dual-level stacked flash memory cell with a MOSFET storage transistor |
| 02/28/2008 | WO2008022454A1 Scalable memory system |
| 02/28/2008 | WO2007133963A3 Nonvolatile memory with convolutional coding for error correction |
| 02/28/2008 | US20080052565 Data read-out circuit in semiconductor memory device and method of data reading in semiconductor memory device |
| 02/28/2008 | US20080052453 Portable data storage device |
| 02/28/2008 | US20080049537 1-transistor type dram cell, a dram device and manufacturing method therefore, driving circuit for dram, and driving method therefor |
| 02/28/2008 | US20080049532 Semiconductor memory device and refresh control method thereof |
| 02/28/2008 | US20080049531 Memory arrangement and method for operating such a memory arrangement |
| 02/28/2008 | US20080049529 Semiconductor memory device |
| 02/28/2008 | US20080049528 Bit line sense amplifier of semiconductor memory device having open bit line structure |
| 02/28/2008 | US20080049524 Logic cell protected against random events |
| 02/28/2008 | US20080049523 Line defect detection circuit for detecting weak line |
| 02/28/2008 | US20080049522 Content addressable memory entry coding for error detection and correction |
| 02/28/2008 | US20080049507 Flash memory device employing disturbance monitoring scheme |
| 02/28/2008 | US20080049498 Integrated Circuit with Analog or Multilevel Storage Cells and User-Selectable Sampling Frequency |
| 02/28/2008 | US20080049492 Spin Memory with Write Pulse |
| 02/28/2008 | US20080049489 Multi-Bit Spin Memory |
| 02/28/2008 | US20080049487 Semiconductor memory device |
| 02/28/2008 | US20080049032 Checkerboard buffer using two-dimensional buffer pages |
| 02/28/2008 | US20080048727 Sense amplifier-based latch |
| 02/28/2008 | DE102007039615A1 Interface circuit has calibration circuit, sampling signal, data signal delay circuit, and minimum delay time that is in calibration circuit, which is displaced between data signal and sampling signal |
| 02/28/2008 | DE102007039192A1 Clock signals transmitting method for memory device i.e. dynamic RAM device, involves receiving clock signals in device and executing read and write operations using one signal and instruction processing operation using another signal |
| 02/28/2008 | DE102007038226A1 Verfahren und Vorrichtung zur Steuerung eines Zugriffs auf einen Datenspeicher in einer elektronischen Schaltung Method and apparatus for controlling access to a data memory in an electronic circuit |
| 02/28/2008 | DE10115817B4 Integrierter Speicherchip mit einem dynamischen Speicher Built-in memory chip with a dynamic memory |
| 02/28/2008 | DE10115816B4 Integrierter dynamischer Speicher und Verfahren zum Betrieb eines integrierten dynamischen Speichers Integrated dynamic memory and method of operating a dynamic memory integrated |
| 02/28/2008 | CA2659828A1 Scalable memory system |
| 02/27/2008 | EP1891642A2 Partial page scheme for memory technologies |
| 02/27/2008 | CN201029070Y Vehicle polyphony loudspeaker |
| 02/27/2008 | CN201029069Y Movable storage device |
| 02/27/2008 | CN201029005Y Multifunctional GPS minitype navigation device |
| 02/27/2008 | CN101133459A Variable memory array self-refresh rates in suspend and standby modes |
| 02/27/2008 | CN101133457A Temperature determination and communication for multiple devices of a memory module |
| 02/27/2008 | CN101131873A Storing card access control chip with spread spectrum clock |
| 02/27/2008 | CN101131865A Multi-stable state read amplifier used for memory device |
| 02/27/2008 | CN101131864A Method and circuit for transmitting a memory clock signal |
| 02/27/2008 | CN101131863A Phonic photograph album |
| 02/27/2008 | CN101131862A Space nonvolatile memory |
| 02/27/2008 | CN101131861A Semiconductor storage device |
| 02/27/2008 | CN101131860A Semiconductor storage device |
| 02/27/2008 | CN101131859A Interface circuit |
| 02/27/2008 | CN101131858A Three-dimensional multi-port memory and control method thereof |
| 02/27/2008 | CN101131857A Silicon memory device and its controller and operation method |
| 02/27/2008 | CN101131856A Memory cell and data storage method used for the same |
| 02/27/2008 | CN100372025C High-speed sensing circuit and method for memory |
| 02/26/2008 | US7337345 Input circuit for an electronic circuit and a method for controlling the reading-in of a data signal |
| 02/26/2008 | US7337282 Memory system and process for controlling a memory component to achieve different kinds of memory characteristics on one and the same memory component |
| 02/26/2008 | US7337249 I/O and memory bus system for DFPS and units with two- or multi-dimensional programmable cell architectures |
| 02/26/2008 | US7337027 Audio signal reproducing apparatus |
| 02/26/2008 | US7336559 Delay-locked loop, integrated circuit having the same, and method of driving the same |
| 02/26/2008 | US7336555 Refresh control circuit of pseudo SRAM |
| 02/26/2008 | US7336554 Semiconductor memory device having a reduced number of pins |
| 02/26/2008 | US7336553 Enhanced sensing in a hierarchical memory architecture |
| 02/26/2008 | US7336552 Sense amplifier connecting/disconnecting circuit arrangement and method for operating such a circuit arrangement |
| 02/26/2008 | US7336551 Semiconductor memory devices and systems, and methods of using having reduced timers and registers |
| 02/26/2008 | US7336550 Semiconductor memory device with reduced multi-row address testing |
| 02/26/2008 | US7336549 Redundancy circuit and repair method for a semiconductor memory device |
| 02/26/2008 | US7336548 Clock generating circuit with multiple modes of operation |
| 02/26/2008 | US7336547 Memory device having conditioning output data |
| 02/26/2008 | US7336546 Global bit select circuit with dual read and write bit line pairs |
| 02/26/2008 | US7336545 Semiconductor device having switch circuit to supply voltage |
| 02/26/2008 | US7336544 Semiconductor device |
| 02/26/2008 | US7336543 Non-volatile memory device with page buffer having dual registers and methods using the same |
| 02/26/2008 | US7336542 Nonvolatile latch |
| 02/26/2008 | US7336523 Memory device using nanotube cells |
| 02/26/2008 | US7335968 High permeability composite films to reduce noise in high speed interconnects |
| 02/26/2008 | US7335906 Phase change memory device |
| 02/21/2008 | WO2008021655A2 High-speed, self-synchronized current sense amplifier |
| 02/21/2008 | WO2008020944A2 Resistive memory device with two select transistors |
| 02/21/2008 | US20080047021 Personalized interactive communication method and system |
| 02/21/2008 | US20080046967 Two-factor authentication of a remote administrator |
| 02/21/2008 | US20080046759 ID installable LSI, secret key installation method, LSI test method, and LSI development method |
| 02/21/2008 | US20080046749 Apparatus and method for disabling an original password of an electrical apparatus |
| 02/21/2008 | US20080044930 Transplanted magnetic random access memory (mram) devices on thermally-sensitive substrates using laser transfer and method of making the same |
| 02/21/2008 | US20080043808 Throttling memory in a computer system |
| 02/21/2008 | US20080043556 Dynamic power control of a memory device thermal sensor |
| 02/21/2008 | US20080043555 Timing control for sense amplifiers in a memory circuit |
| 02/21/2008 | US20080043554 Semiconductor memory device realizing high-speed access |
| 02/21/2008 | US20080043553 Semiconductor memory device and method of testing the same |
| 02/21/2008 | US20080043552 Integrated circuit |
| 02/21/2008 | US20080043549 Semiconductor memory apparatus and method of controlling the same |
| 02/21/2008 | US20080043548 Semiconductor memory device for stack package and read data skew control method thereof |
| 02/21/2008 | US20080043547 Latency control circuit and method using queuing design method |
| 02/21/2008 | US20080043546 Method of Controlling A Memory Device Having a Memory Core |
| 02/21/2008 | US20080043545 Multiple Data Rate Ram Memory Controller |
| 02/21/2008 | US20080043544 Memory device and method of improving the reliability of a memory device |
| 02/21/2008 | US20080043543 Method for manufacturing, writing method and reading non-volatile memory |
| 02/21/2008 | US20080043542 Static random access memory device having reduced leakage current during active mode and a method of operating thereof |
| 02/21/2008 | US20080043541 Semiconductor memory device having a plurality of chips and capability of outputting a busy signal |
| 02/21/2008 | US20080043540 Multilevel driver |
| 02/21/2008 | US20080043525 Bit cell reference device and methods thereof |
| 02/21/2008 | US20080043521 Method of determining a memory state of a resistive memory cell and device measuring the memory state of a resistive memory cell |
| 02/21/2008 | US20080043513 Intergrated circuit having memory with resistive memory cells |
| 02/21/2008 | US20080042685 Input and output circuit |
| 02/21/2008 | DE102007036547A1 Semiconductor memory unit for use in portable communication system, has interface unit with semaphore and mail box areas, in which processors are accessed in memory region to provide interface function for communication between processors |
| 02/20/2008 | EP1890294A2 Buffered memory module with configurable interface width |
| 02/20/2008 | EP1889367A1 Measure-initialized delay locked loop with live measurement |
| 02/20/2008 | EP1889294A1 One-time programmable crosspoint memory with a diode as an antifuse |
| 02/20/2008 | CN201023749Y Music wine bottle |
| 02/20/2008 | CN201023349Y Infant reader with sounding function |