| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 08/10/2000 | WO2000046692A1 Signal processor and product-sum operating device for use therein with rounding function |
| 08/10/2000 | WO2000046663A1 Complete fast-chainable adder |
| 08/10/2000 | WO2000016182A9 Random number generator seeding method and apparatus |
| 08/10/2000 | CA2361451A1 Signal processor and product-sum operating device for use therein with rounding function |
| 08/09/2000 | EP1026582A2 Handling of load errors in computer processors |
| 08/09/2000 | EP1025674A1 Signature verification for elgamal schemes |
| 08/09/2000 | EP1025673A1 Accelerated signature verification on an elliptic curve |
| 08/09/2000 | EP1025486A1 Fast regular multiplier architecture |
| 08/09/2000 | EP1025485A2 Multifunction floating point addition/subtraction pipeline and bipartite look-up table |
| 08/09/2000 | EP1025449A1 Electron devices for single electron and nuclear spin measurement |
| 08/08/2000 | US6101621 Logic circuit and method for designing the same |
| 08/08/2000 | US6101523 Method and apparatus for controlling calculation error |
| 08/08/2000 | US6101522 Product-sum calculation circuit constructed of small-size ROM |
| 08/08/2000 | US6101521 Data processing method and apparatus operable on an irrational mathematical value |
| 08/08/2000 | US6101520 Arithmetic logic unit and method for numerical computations in Galois fields |
| 08/08/2000 | US6101518 Arithmetic unit, correlation arithmetic unit and dynamic image compression apparatus |
| 08/08/2000 | US6101516 Normalization shift prediction independent of operand subtraction |
| 08/08/2000 | US6101428 Auto remote control with signal strength discrimination |
| 08/08/2000 | US6100905 Expansion of data |
| 08/08/2000 | US6099158 Apparatus and methods for execution of computer instructions |
| 08/08/2000 | US6099053 Lock with improved torsional strength |
| 08/03/2000 | WO2000045316A1 System and method for generating dependent data |
| 08/03/2000 | WO2000045254A1 Floating point square root and reciprocal square root computation unit in a processor |
| 08/03/2000 | WO2000045253A1 Division unit in a processor using a piece-wise quadratic approximation technique |
| 08/03/2000 | WO2000045251A2 Floating and parallel fixed point square root and reciprocal point square computation unit in a processor |
| 08/03/2000 | WO2000022545A3 Digital processing device |
| 08/03/2000 | CA2359692A1 System and method for generating dependent data |
| 08/02/2000 | EP1024619A2 Serial to parallel conversion of data to facilitate sharing a single buffer among multiple channels |
| 08/01/2000 | US6098192 Cost reduced finite field processor for error correction in computer storage devices |
| 08/01/2000 | US6098147 Longest coincidence data detection using associative memory units having interleaved data |
| 08/01/2000 | US6098087 Method and apparatus for performing shift operations on packed data |
| 08/01/2000 | US6097988 Logic system and method employing multiple configurable logic blocks and capable of implementing a state machine using a minimum amount of configurable logic |
| 08/01/2000 | US6097889 Signal processing apparatus with stages in a signal path operating as LFSR of alternable type and method for processing signals |
| 08/01/2000 | US6097815 Method of and an apparatus for generating pseudo-random numbers |
| 08/01/2000 | US6097813 Digital signature protocol with reduced bandwidth |
| 08/01/2000 | US6097211 Configuration memory integrated circuit |
| 08/01/2000 | US6095411 Electronic debit card and method for recharging an electronic debit card |
| 07/29/2000 | CA2295278A1 Serial to parallel conversion of data to facilitate sharing a single buffer among multiple channels |
| 07/27/2000 | WO2000043913A1 System and method for facilitating a windows based content manifestation environment within a www browser |
| 07/27/2000 | WO2000043865A1 Method and apparatus for generating families of code signals using multiscale shuffling |
| 07/27/2000 | WO2000043844A1 Electronic control system for a machine |
| 07/26/2000 | EP1022656A2 Communication system for communication between in-vehicle terminals and center, and in-vehicle terminal employed in communication system |
| 07/26/2000 | EP1022653A1 Method for the calculation of products modulo (2n+1) and subsequent addition modulo (2n) |
| 07/25/2000 | US6094715 SIMD/MIMD processing synchronization |
| 07/25/2000 | US6094669 Circuit and method for determining overflow in signed division |
| 07/25/2000 | US6094668 Floating point arithmetic unit including an efficient close data path |
| 07/25/2000 | US6094572 Method of generating a random number from a radio signal |
| 07/25/2000 | US6094505 Information processing methodology |
| 07/25/2000 | US6094443 Apparatus and method for detecting a prescribed pattern in a data stream by selectively skipping groups of nonrelevant data bytes |
| 07/25/2000 | US6093213 Flexible implementation of a system management mode (SMM) in a processor |
| 07/20/2000 | WO2000042733A1 Method and apparatus for masking cryptographic operations |
| 07/20/2000 | WO2000042523A1 Binary data counter, area information extractor and huffman converter |
| 07/20/2000 | WO2000042484A2 Acceleration and security enhancements for elliptic curve and rsa coprocessors |
| 07/20/2000 | WO2000017802A3 Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith |
| 07/19/2000 | EP1020792A1 Multiplier circuit performing ordinary as well as Galois field multiplication |
| 07/19/2000 | EP1020791A1 Circuit and method for random number generation |
| 07/19/2000 | EP1020790A1 High speed memory-based buffer and system and method for use thereof |
| 07/19/2000 | EP1020027A1 Cmos differential voltage controlled logarithmic attenuator and method |
| 07/18/2000 | US6092179 Core processor with customizable function unit |
| 07/18/2000 | US6092094 Execute unit configured to selectably interpret an operand as multiple operands or as a single operand |
| 07/18/2000 | US6092077 Binary-oriented set sequencing |
| 07/18/2000 | US6091819 Accelerating public-key cryptography by precomputing randomly generated pairs |
| 07/18/2000 | US6091682 Apparatus for and method of detecting pre-pit information |
| 07/18/2000 | US6091645 Programmable read ports and write ports for I/O buses in a field programmable memory array |
| 07/18/2000 | US6091262 Field programmable gate array with mask programmable I/O drivers |
| 07/18/2000 | CA2078319C Control signal method and device |
| 07/13/2000 | WO2000041162A1 Method and apparatus for distributed, agile calculation of beamforming time delays and apodization values |
| 07/13/2000 | WO2000041100A1 System and method for recursive path analysis of dbms procedures |
| 07/13/2000 | WO2000041068A1 Method for generating a value for a multiplicative inverse of an element of a galois field |
| 07/13/2000 | WO2000041055A2 Match line control circuit for content addressable memory |
| 07/13/2000 | WO2000041052A2 Method and system for capitalizing a business and maintaining a customer base and/or revenue base |
| 07/13/2000 | WO2000020979A3 Method and apparatus for element selection exhausting an entire array |
| 07/13/2000 | CA2358126A1 System and method for recursive path analysis of dbms procedures |
| 07/12/2000 | EP1018070A1 A random number generator |
| 07/11/2000 | US6088800 Encryption processor with shared memory interconnect |
| 07/11/2000 | US6088715 Close path selection unit for performing effective subtraction within a floating point arithmetic unit |
| 07/11/2000 | US6088453 Scheme for computing Montgomery division and Montgomery inverse realizing fast implementation |
| 07/11/2000 | US6088421 Method and apparatus for providing scaled ratio counters to obtain agent profiles |
| 07/11/2000 | US6088353 Sorting networks having reduced-area layouts |
| 07/11/2000 | US6087883 Multi-tanh doublets using emitter resistors |
| 07/11/2000 | US6087850 Operation circuit |
| 07/11/2000 | CA2032519C Avoiding latent errors in a logic network for majority select ion of binary signals |
| 07/06/2000 | WO2000039668A1 A method for accelerating cryptographic operations on elliptic curves |
| 07/06/2000 | WO2000039667A1 Code generator |
| 07/06/2000 | WO2000038953A1 Configuration programming of input/output connections for network modules in a multiplexed vehicle communication system |
| 07/06/2000 | CA2353395A1 A method for accelerating cryptographic operations on elliptic curves |
| 07/05/2000 | EP1016959A2 Pseudorandom number generator for WCDMA |
| 07/05/2000 | EP1016216A1 Quantum computer |
| 07/05/2000 | CN1259211A Arithmetic device |
| 07/04/2000 | US6085275 Data processing system and method thereof |
| 07/04/2000 | US6085214 Digital multiplier with multiplier encoding involving 3X term |
| 07/04/2000 | US6085213 Method and apparatus for simultaneously multiplying two or more independent pairs of operands and summing the products |
| 07/04/2000 | US6085212 Efficient method for performing close path subtraction in a floating point arithmetic unit |
| 07/04/2000 | US6085211 Logic circuit and floating-point arithmetic unit |
| 07/04/2000 | US6085210 High-speed modular exponentiator and multiplier |
| 07/04/2000 | US6085208 Leading one prediction unit for normalizing close path subtraction results within a floating point arithmetic unit |
| 07/04/2000 | US6085207 Method of performing signed operations with unsigned instructions in a microprocessor |
| 07/04/2000 | US6085203 Method for converting data formats which differ from one another |
| 07/04/2000 | US6085197 Object graph editing context and methods of use |
| 07/04/2000 | US6085046 Device for processing digital data of a DX code |