Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
10/2000
10/03/2000US6128637 Arithmetic unit and operating method
10/03/2000US6128614 Method of sorting numbers to obtain maxima/minima values with ordering
10/03/2000US6128549 RF interrogatable processing system
10/03/2000US6127863 Efficient fractional divider
10/03/2000US6127842 Modified adder tree structure and method using logic and gates to generate carry-in values
09/2000
09/28/2000WO2000057270A1 Adder circuit
09/28/2000WO2000057264A1 Medical practice management system
09/28/2000WO2000041052A3 Method and system for capitalizing a business and maintaining a customer base and/or revenue base
09/27/2000EP1039373A2 Multi-bit carry chain standard cell
09/27/2000EP1039372A1 Semiconductor circuit for arithmetic operation and method of arithmetic operation
09/27/2000EP1038403A1 Device for multiplying with constant factors and use of said device for video compression (mpeg)
09/27/2000EP1038371A1 Transformation methods for optimizing elliptic curve cryptographic computations
09/27/2000EP1038260A1 Neural networks and neural memory
09/27/2000EP1038216A1 Implementation of multipliers in programmable arrays
09/27/2000EP1038215A1 Hamming value comparison for unweighted bit arrays
09/27/2000EP1038208A2 Binary adder
09/27/2000CN1267856A Digital data document encrypting apparatus and method, and recording medium of encrypted programme
09/26/2000US6125381 Recursively partitioned carry select adder
09/26/2000US6125380 Dividing method
09/26/2000US6125379 Parallel VLSI shift switch logic devices
09/26/2000US6125378 Method and apparatus for generating families of code signals using multiscale shuffling
09/26/2000US6125351 System and method for the synthesis of an economic web and the identification of new market niches
09/26/2000US6125049 Match line control circuit for content addressable memory
09/26/2000US6124736 Logic circuit and its forming method
09/26/2000US6124735 Method and apparatus for a N-nary logic circuit using capacitance isolation
09/26/2000US6123671 Method and apparatus for distributed, agile calculation of beamforming time delays and apodization values
09/26/2000CA2238299C A filter co-processor
09/21/2000DE19910620A1 Apparatus for sequential processing
09/21/2000DE10006595A1 Car body oscillation suppression device for vehicle, determines timing of control output of power source corresponding to natural vibration period of vehicle
09/20/2000EP1037148A1 Error coding method
09/20/2000EP1037139A1 Adder circuit
09/20/2000CN1267136A Logic circuit and carry lookahead circuit
09/19/2000US6122736 Key agreement and transport protocol with implicit signatures
09/19/2000US6122730 "Test under mask high" instruction and "Test under mask low" instruction executing method and apparatus
09/19/2000US6122724 Central processing unit having instruction queue of 32-bit length fetching two instructions of 16-bit fixed length in one instruction fetch operation
09/19/2000US6122655 Efficient use of inverting cells in multiplier converter
09/19/2000US6121871 Apparatus and method for comparing digital words using a last bit detection operation
09/19/2000US6121797 Energy economized pass-transistor logic circuit and full adder using the same
09/19/2000CA2039988C Processor chip
09/13/2000EP1034633A1 Method of providing and retrieving a data segment
09/13/2000CN1266237A Multi-language domain name service
09/12/2000US6119198 Recursive address centrifuge for distributed memory massively parallel processing systems
09/12/2000US6119141 Resistive decoupling of function selection signals from input multiplexers in arithmetic logical units ALU
09/12/2000US6119120 Computer implemented methods for constructing a compressed data structure from a data string and for using the data structure to find data patterns in the data string
09/12/2000US6118707 Method of operating a field programmable memory array with a field programmable gate array
09/12/2000US6118304 Method and apparatus for logic synchronization
09/12/2000CA2261696C Data de-rotator and de-interleaver
09/08/2000WO2000052825A1 Interconnection resources for programmable logic integrated circuit devices
09/08/2000WO2000052824A1 Programmable logic device with carry-select addition
09/08/2000WO2000052569A2 A method and system for integrated service administration via a directory service
09/08/2000WO2000052568A1 N BIT BY M BIT MULTIPLICATION OF TWOS COMPLEMENT NUMBERS USING N/2+1 x M/2+1 BIT MULTIPLIERS
09/06/2000EP1032892A2 Methods apparatus and computer program products for accumulating logarithmic values
09/06/2000EP1032873A1 Apparatus for multiprecision integer arithmetic
09/05/2000US6115733 Method and apparatus for calculating reciprocals and reciprocal square roots
09/05/2000US6115732 Method and apparatus for compressing intermediate products
09/05/2000US6115731 Scalable overflow clamp and method for a digital gain scaler/summer
09/05/2000US6115730 Reloadable floating point unit
09/05/2000US6115729 Floating point multiply-accumulate unit
09/05/2000US6115444 Energy conserving counter using terminal count value and method therefor
09/05/2000US6115294 Method and apparatus for multi-bit register cell
09/05/2000US6114946 Combinational logic for comparing N-bit wide buses
09/05/2000US6114945 Apparatus and method for programmable fast comparison of a result of a logic operation with an selected result
09/05/2000US6114873 Content addressable memory programmable array
08/2000
08/31/2000WO2000050966A2 Multi-language domain name service
08/30/2000EP1031207A1 Apparatus, and associated method, for generating a pseudo-random number
08/30/2000EP1031073A2 A method and apparatus for multi-function arithmetic
08/30/2000CN1264865A Operation method for document exchanger in unknown behavior mode and its architecture
08/29/2000US6112220 Programmable overflow protection in digital processing
08/29/2000US6112217 Method and apparatus for generating clock signals
08/29/2000US6112144 Field characteristic marking system
08/29/2000US6111794 Memory interface circuit including bypass data forwarding with essentially no delay
08/29/2000US6111427 Logic circuit having different threshold voltage transistors and its fabrication method
08/29/2000US6109777 Division with limited carry-propagation in quotient accumulation
08/24/2000WO2000049558A1 Generating random numbers from random signals without being affected by any interfering signals
08/24/2000WO2000049533A2 Hierarchical indexing for accessing hierarchically organized information in a relational system
08/24/2000WO2000049494A1 Fast multi-format adder
08/24/2000WO2000049484A1 Digital electronic method for increasing the calculation accuracy in non-linear functions and hardware architecture for carrying out said method
08/24/2000DE19907600A1 Biometric random value generator uses pressure and writing time values for optically scanned signature or writing sample for addressing coordinate network intersection points providing corresponding numbers
08/23/2000EP1030238A2 Circuit for generating a periodic function
08/23/2000EP1029394A1 Method for generating a random number on a quantum-mechanics basis and random generator
08/23/2000EP1029326A1 Programmable access protection in a flash memory device
08/23/2000CN1264076A Method for obtaining third-value code with balance bridge
08/22/2000US6108772 Method and apparatus for supporting multiple floating point processing models
08/22/2000US6108682 Division and/or square root calculating circuit
08/22/2000US6108678 Method and apparatus to detect a floating point mantissa of all zeros or all ones
08/22/2000US6108658 Single pass space efficent system and method for generating approximate quantiles satisfying an apriori user-defined approximation error
08/22/2000US6107846 Frequency multiplication circuit
08/17/2000WO2000048070A1 System and method to implement a cross-bar switch of a broadband processor
08/16/2000EP1027641A1 Computer processor and method for data streaming
08/16/2000EP0861539A4 Efficient cryptographic hash functions and methods for amplifying the security of hash functions and pseudo-random functions
08/16/2000EP0856169B1 Complex signal limiting
08/16/2000EP0850482B1 Method and apparatus for detecting assertion of multiple signals
08/16/2000EP0680633B1 System for dynamically allocating memory registers for forming pseudo queues
08/16/2000CN1263305A Digital data file scrambler and its method
08/15/2000US6105047 Method and apparatus for trading performance for precision when processing denormal numbers in a computer system
08/15/2000US6105024 System for memory management during run formation for external sorting in database system
08/15/2000US6104811 Cryptographically secure pseudo-random bit generator for fast and secure encryption
08/15/2000US6104810 Pseudorandom number generator with backup and restoration capability
08/15/2000US6104642 Method and apparatus for 1 of 4 register file design
08/15/2000CA2205830C A processor for performing shift operations on packed data