Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
05/2001
05/02/2001EP1096369A2 A counter readout control apparatus and control method therefor
05/02/2001EP1096368A1 Method and circuit for resolution adaption
05/02/2001EP1095527A1 Single-key security system
05/02/2001CN1293781A Bindary data counter, area information extractor and Huffman converter
05/02/2001CN1293394A Processor system
05/01/2001US6226774 System and method for generating a hazard-free asynchronous circuit
05/01/2001US6226737 Apparatus and method for single precision multiplication
05/01/2001US6226735 Method and apparatus for configuring arbitrary sized data paths comprising multiple context processing elements
05/01/2001US6226664 Method and device for adding and subtracting thermometer coded data
05/01/2001US6226660 Efficient method of implementing random number generators
05/01/2001US6226658 Layout code tuning in universally readable document files
05/01/2001US6226411 Method for data compression and restoration
04/2001
04/26/2001WO2001029974A1 High-speed acs unit for a viterbi decoder
04/26/2001WO2001029880A2 Method for utilizing resource characterizations to optimize performance in an electronic device
04/26/2001WO2001029654A2 Information management system for remote computing platforms
04/26/2001WO2001029652A2 A cryptographic accelerator
04/26/2001WO2001029651A2 Complex-valued cordic-like methods for signal processing tasks
04/26/2001DE19951119A1 Automobile control method has relationship between operating parameter and corresponding control parameter determined by individual driver
04/26/2001DE10003472C1 Random number generator on IC with significantly improved independence of both signals
04/26/2001CA2387766A1 High-speed acs unit for a viterbi decoder
04/25/2001EP1094603A1 A random pulse generator, a random number generator and a probability random event generator
04/25/2001EP1094401A1 Data calculating device
04/25/2001EP1094400A1 Binary data counter, area information extractor and hough transformdevice
04/25/2001EP1093624A1 Computer-implemented conversion of combination-logic module to improve timing characteristics
04/25/2001EP1093420A1 Vehicle suspension control with compensation for yaw correcting active brake control
04/24/2001US6223199 Method and apparatus for an N-NARY HPG gate
04/24/2001US6223198 Method and apparatus for multi-function arithmetic
04/24/2001US6223197 Constant multiplier, method and device for automatically providing constant multiplier and storage medium storing constant multiplier automatic providing program
04/24/2001US6223196 Shared mac (multiply accumulate) system and method
04/24/2001US6223192 Bipartite look-up table with output values having minimized absolute error
04/24/2001US6223166 Cryptographic encoded ticket issuing and collection system for remote purchasers
04/24/2001US6223134 Instrumentation system and method including an improved driver software architecture
04/24/2001US6223096 Elevator system for transferring a wafer boat with automatic horizontal attitude control
04/24/2001US6222824 Statistical call admission control
04/19/2001WO2001028176A2 Frequency correction using the cordic algorithm
04/19/2001WO2001027742A1 A partitioned multiplier
04/19/2001DE19948899A1 Verfahren und Schaltungsanordnung zur digitalen Frequenzkorrektur eines Signals Method and circuit arrangement for digital frequency correction of a signal
04/19/2001DE10038491A1 64-bit comparator for cache memory of IC, has three transistor stages, one of which outputs values greater than the input values
04/19/2001DE10035925A1 Cryptological method involves using mean Galois objects for encoding and decoding with characteristics adapted to word machine's length for
04/18/2001EP0834115B1 Circuit for producing logic elements representable by threshold equations
04/17/2001US6219789 Microprocessor with coprocessing capabilities for secure transactions and quick clearing capabilities
04/17/2001US6219756 Rapidly-readable register file
04/17/2001US6219688 Method, apparatus and system for sum of plural absolute differences
04/17/2001US6219687 Method and apparatus for an N-nary Sum/HPG gate
04/17/2001US6219686 Method and apparatus for an N-NARY sum/HPG adder/subtractor gate
04/17/2001US6219684 Optimized rounding in underflow handlers
04/17/2001US6219598 Automotive controller maintaining operation of controlled device when a microcomputer overruns and cannot be reset
04/17/2001US6218973 Binary random number generator
04/17/2001US6218861 Functional block and semiconductor integrated circuit architected by a plurality of functional blocks in combination
04/12/2001WO2001025986A2 A method and system for publication and revision of hierarchically organized sets of static intranet and internet web pages
04/12/2001WO2001025943A1 Method and apparatus for detecting the type of interface to which a peripheral device is connected
04/12/2001WO2001025942A1 Method and apparatus for detecting the type of interface to which a peripheral device is connected
04/12/2001WO2001025899A1 Improved multiplication circuit
04/12/2001WO2001025898A1 Digital multiply-accumulate circuit that can operate on both integer and floating point numbers simultaneously
04/12/2001WO2001025897A1 Method and apparatus for dynamic sort collation
04/12/2001WO2000062182A3 Parallel data processing apparatus
04/12/2001DE19948100A1 Prozessorsystem Processor system
04/11/2001EP1091292A2 A method for translating a source operation to a target operation, and computer program for the method
04/11/2001EP1091290A2 Processor system having shift instruction
04/10/2001US6216147 Method and apparatus for an N-nary magnitude comparator
04/10/2001US6216146 Method and apparatus for an N-nary adder gate
04/10/2001US6215874 Random number generator and method for same
04/10/2001US6215325 Implementing a priority function using ripple chain logic
04/10/2001CA2195942C Method and apparatus for inserting source identification data into a video signal
04/05/2001WO2001024439A1 Device, program or system for processing secret information
04/05/2001WO2001024367A1 Noise tolerant conductance-based logic gate and methods of operation and manufacturing thereof
04/05/2001WO2001024063A1 Method and apparatus for designing sequential circuits
04/05/2001WO2001023992A1 Adder having reduced number of internal layers and method of operation thereof
04/05/2001WO2001023228A1 Remote keyless entry system with advanced activation features
04/04/2001EP1089227A2 Interpolation method and apparatus
04/04/2001EP1089165A2 A floating point instruction set architecture and implementation
04/04/2001EP1087875A1 Driveline management for a motor vehicle
04/04/2001EP0864124A4 An improved pseudo-random generator
04/03/2001US6212539 Methods and apparatus for handling and storing bi-endian words in a floating-point processor
04/03/2001US6212538 Method for the performance of an integer division with a modular arithmetic coprocessor
04/03/2001US6212507 Fuzzy inference circuit using charge coupled device
04/03/2001US6212277 Elliptic curve transformation device, utilization device and utilization system
04/03/2001US6212106 Multi-bit match detection circuit
04/03/2001US6211704 Asynchronous sensing differential logic (ASDL) circuit
04/03/2001US6210274 Universal gaming engine
03/2001
03/29/2001WO2001022653A2 Key escrow systems
03/29/2001WO2001022292A2 Systems, methods, and software for building intelligent on-line communities
03/29/2001CA2385453A1 Systems, methods, and software for building intelligent on-line communities
03/28/2001EP1087290A1 Absolute value comparator
03/27/2001US6209091 Multi-step digital signature method and system
03/27/2001US6209076 Method and apparatus for two-stage address generation
03/27/2001US6209022 Slave station with two output circuits commonly and directly connected to a line for serially transmitting data to a master station in two operational modes
03/27/2001US6209017 High speed digital signal processor
03/27/2001US6209016 Co-processor for performing modular multiplication
03/27/2001US6209012 System and method using mode bits to support multiple coding standards
03/27/2001US6208910 System and method for determining the location of a mail piece
03/27/2001US6208908 Integrated order selection and distribution system
03/27/2001US6208282 A/D converter with input capacitor, feedback capacitor, and two invertors
03/27/2001US6208264 Personal verification in a commercial transaction system
03/22/2001WO2001020444A1 Methods and systems for processing food orders
03/22/2001WO2001020427A2 Methods and apparatus for multiplication in a galois field gf(2m), and encoders and decoders using same
03/22/2001DE19963962C1 Pseudo-random generator for radio transmitter or receiver uses registers coupled to arithmetic-logic unit providing pseudo-random words and processor controlling pseudo-random generator sequence
03/22/2001DE10038500A1 Connection arrangement of planar conductors in motor vehicles, has pair of contact surfaces which is arranged adjacently and projected up equally from conductor surface
03/21/2001EP1084548A2 Secure modular exponentiation with leak minimization for smartcards and other cryptosystems
03/21/2001CN1288545A Method and apparatus for arithmetic operation