| Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043) |
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| 08/28/2001 | US6282480 Electronic brake controller and display |
| 08/28/2001 | US6282464 Technique for effectively providing audio information in a vehicle |
| 08/28/2001 | US6282318 Method and system for combining pattern matching and optimization |
| 08/28/2001 | US6282290 High speed modular exponentiator |
| 08/28/2001 | US6282181 Pseudorandom number sequence generation in radiocommunication systems |
| 08/28/2001 | US6281896 Data processor controlled interface with multiple tree of elements views expandable into individual detail views |
| 08/23/2001 | WO2001061467A1 Performing calculation in digital signal processing equipment |
| 08/23/2001 | WO2001061466A1 Document creation and scheduling of applications' jobs |
| 08/23/2001 | WO2001061465A1 Elapsed time clock for part call tag-based replenishment system |
| 08/23/2001 | WO2001061464A1 State machine, semiconductor device using state machine, and method of design thereof |
| 08/23/2001 | US20010016865 Multiplier circuit for reducing the number of necessary elements without sacrificing high speed capability |
| 08/23/2001 | US20010016864 Computing unit for signal processing |
| 08/23/2001 | US20010016862 Parallel random pattern generator circuit and scramble circuit and descramble circuit using the same |
| 08/23/2001 | US20010016861 Apparatus for performing packed shift operations |
| 08/23/2001 | US20010016852 Automatic document archiving for a computer system |
| 08/23/2001 | US20010016789 Electronic control system |
| 08/23/2001 | US20010016012 Digital signal processing device and a method and a delta-sigma modulator using the same method |
| 08/23/2001 | DE10107321A1 Verfahren und Vorrichtung zur schnellen Berechnung des natürlichen Log(x) Method and apparatus for rapid calculation of the natural log (x) |
| 08/22/2001 | EP1126613A2 Logic structure and circuit for fast carry |
| 08/22/2001 | EP1125224A1 Techniques for deploying analytic models in parallel |
| 08/22/2001 | EP1125216A2 Digital processing device |
| 08/22/2001 | EP1125189A1 Methods of digital steganography for multimedia data |
| 08/22/2001 | EP0929862A4 Logic elements for interlaced carry/borrow systems having a uniform layout |
| 08/22/2001 | EP0767957B1 Method and apparatus for copy protection for various recording media |
| 08/22/2001 | CN1309347A Microprocessor with improved instruction set system structure |
| 08/21/2001 | US6279126 Method for verifying that a processor is executing instructions in a proper endian mode when the endian mode is changed dynamically |
| 08/21/2001 | US6279024 High performance, low power incrementer for dynamic circuits |
| 08/21/2001 | US6279023 System for computing the multiplicative inverse of an element of a Galois field without using tables |
| 08/21/2001 | US6279015 Method and apparatus for providing a graphical user interface for creating and editing a mapping of a first structural description to a second structural description |
| 08/21/2001 | US6278307 Method and apparatus for 50% duty-cycle programmable divided-down clock with even and odd divisor rates |
| 08/16/2001 | WO2001059591A2 System, method and computer program product for catching, marking, managing and searching content |
| 08/16/2001 | WO2001059559A1 Apparatus for electrically controlling devices, and a method of operating it |
| 08/16/2001 | US20010013838 Bus encoding/decoding apparatus and method |
| 08/14/2001 | US6275842 Low power multiplier for CPU and DSP |
| 08/14/2001 | US6275841 1-of-4 multiplier |
| 08/14/2001 | US6275840 Fast overflow detection in decoded bit-vector addition |
| 08/14/2001 | US6275839 Method and system for immediate exponent normalization in a fast floating point adder |
| 08/14/2001 | US6275838 Method and apparatus for an enhanced floating point unit with graphics and integer capabilities |
| 08/14/2001 | US6275837 Method for the implementation of an elementary modular operation according to the Montgomery method |
| 08/14/2001 | US6275834 Apparatus for performing packed shift operations |
| 08/14/2001 | US6275782 Non-intrusive performance monitoring |
| 08/14/2001 | US6275767 Method for implementing an air traffic service unit |
| 08/14/2001 | US6275744 Substrate feed control |
| 08/14/2001 | US6275586 Cryptographically secure pseudo random number generator |
| 08/14/2001 | US6275520 Pseudo-noise generating apparatus |
| 08/14/2001 | US6275141 Single-key security system |
| 08/09/2001 | WO2001058088A1 Apparatus and methods for providing data synchronization by facilitating data synchronization system design |
| 08/09/2001 | WO2001057857A1 Generating a multilevel calibration sequence for precompensation |
| 08/09/2001 | WO2001057733A1 Apparatus and methods for providing personalized application search results for wireless devices based on user profiles |
| 08/09/2001 | WO2001057708A2 Method and apparatus for coordinate system conversions |
| 08/09/2001 | WO2001057694A1 Apparatus and methods for optimizing traffic volume in wireless email communications |
| 08/09/2001 | WO2001057673A1 Coordinated and personalized application and data management |
| 08/09/2001 | WO2001004724A3 A partitioned shift right logic circuit having rounding support |
| 08/09/2001 | WO2000068783A3 Digital signal processor computation core |
| 08/09/2001 | US20010013048 Method and circuits for performing the quick search of the minimum/maximum value among a set of numbers |
| 08/09/2001 | US20010012364 Data-processing device and method of operating said device |
| 08/09/2001 | US20010012363 Pseudo-random sequence generator and associated method |
| 08/09/2001 | US20010012360 Method of executing a cryptographic protocol between two electronic entities |
| 08/09/2001 | DE10104209A1 Verfahren und System zum Erhöhen der Leistung durch Ersetzen einer Steuerung einer Maschine mit finiten Zuständen durch eine hardware-implementierte Datenstrukturmanipulation A method and system for increasing the performance by replacing a control of a finite state machine through a hardware-implemented data structure of manipulation |
| 08/09/2001 | DE10041511C1 Additionsschaltung für digitale Daten Addition circuit for digital data |
| 08/09/2001 | CA2397156A1 Method and apparatus for coordinate system conversions |
| 08/08/2001 | EP1122909A1 Method for performing a cryptographic protocol between two electronic units |
| 08/08/2001 | EP1122889A2 Efficient galois field multiplier structures for error-correction encoding and decoding |
| 08/08/2001 | EP1122638A2 Branch instruction execution device |
| 08/08/2001 | EP1122637A2 Computation unit for limited signal processing |
| 08/08/2001 | EP1121653A1 Analytic logical data model |
| 08/08/2001 | EP0570067B1 Control device for interface control between a test machine and multi-channel electronic circuitry, in particular acording to Boundary Test Standard |
| 08/08/2001 | CN1307769A Mask generating polynomials for pseudo-random noise generators |
| 08/08/2001 | CN1307757A Pseudorandom number sequence generation in radiocommunication systems |
| 08/08/2001 | CN1069423C Sorting system and method |
| 08/07/2001 | US6272620 Central processing unit having instruction queue of 32-bit length fetching two instructions of 16-bit fixed length in one instruction fetch operation |
| 08/07/2001 | US6272514 Method and apparatus for interruption of carry propagation on partition boundaries |
| 08/07/2001 | US6272513 Multiplying device |
| 08/07/2001 | US6272512 Data manipulation instruction for enhancing value and efficiency of complex arithmetic |
| 08/07/2001 | US6272511 Weightless binary N-tuple thresholding hierarchies |
| 08/07/2001 | US6272510 Arithmetic unit, correlation arithmetic unit and dynamic image compression apparatus |
| 08/07/2001 | US6272493 System and method for facilitating a windows based content manifestation environment within a WWW browser |
| 08/07/2001 | US6272465 Monolithic PC audio circuit |
| 08/07/2001 | US6272223 System for supplying screened random numbers for use in recreational gaming in a casino or over the internet |
| 08/07/2001 | US6272188 Single-cycle accelerator for extremun state search |
| 08/07/2001 | CA2239367C Longest coincidence data detection using associative memory units having interleaved data |
| 08/04/2001 | CA2331004A1 Efficient galois field multiplier structures for error-correction encoding and decoding |
| 08/02/2001 | WO2001055883A2 Method and device for the iterative calculation of the hyperexponential boundary function |
| 08/02/2001 | WO2001055838A2 Modular exponential algorithm in an electronic component using a public key encryption algorithm |
| 08/02/2001 | WO2001055837A1 Apparatus and method for modifying an m-sequence with arbitrary phase shift |
| 08/02/2001 | WO2001055836A1 Random number generator |
| 08/02/2001 | WO2001055821A2 Microprocessor resistant to power analysis |
| 08/02/2001 | US20010011353 Secure module with microprocessor and co-processor |
| 08/02/2001 | US20010011344 Data processing system and register file |
| 08/02/2001 | US20010011291 Data processor and data processing system |
| 08/02/2001 | US20010011276 Scanner enhanced remote control unit and system for automatically linking to on-line resources |
| 08/02/2001 | US20010011262 Photo kiosk for transmitting a photographic image |
| 08/02/2001 | DE10003830A1 Grenzhyperexponentialtaschenrechner bzw. Grenzhyperexponentialrechner Grenzhyperexponentialtaschenrechner or Grenzhyperexponentialrechner |
| 08/01/2001 | EP1120708A2 Arrangement and method for signal processing and storage |
| 07/31/2001 | US6269470 Efficient routing of conductors between datapaths |
| 07/31/2001 | US6269387 Method and apparatus for 3-stage 32-bit adder/subtractor |
| 07/31/2001 | US6269386 3X adder |
| 07/31/2001 | US6269385 Apparatus and method for performing rounding and addition in parallel in floating point multiplier |
| 07/31/2001 | US6269384 Method and apparatus for rounding and normalizing results within a multiplier |
| 07/31/2001 | US6269383 Method and apparatus for integer arithmetic |