Patents
Patents for G06F 7 - Methods or arrangements for processing data by operating upon the order or content of the data handled (93,043)
05/2001
05/31/2001US20010002486 Leak-resistant cryptographic method and apparatus
05/31/2001US20010002484 Visual instruction set for CPU with integrated graphics functions
05/31/2001CA2394452A1 Information processing system
05/30/2001CN1297635A Elliptic curve cryptographic process and device for computer
05/30/2001CA2327168A1 System and method for computing a square of a number
05/29/2001US6240498 Object oriented storage pool apparatus and method
05/29/2001US6240438 Multiplier circuit for reducing the number of necessary elements without sacrificing high speed capability
05/29/2001US6240437 Long instruction word controlling plural independent processor operations
05/29/2001US6240436 High speed montgomery value calculation
05/29/2001US6240433 High accuracy estimates of elementary functions
05/29/2001US6240432 Enhanced random number generator
05/29/2001US6240340 Control unit for vehicle and total control system therefor
05/29/2001US6240338 Seed ROM for reciprocal computation
05/29/2001US6240335 Distributed control system architecture and method for a material transport system
05/29/2001US6240152 Apparatus and method for switching frequency modes in a phase locked loop system
05/29/2001US6239628 Self-timed semiconductor integrated circuit device
05/29/2001US6239614 Semiconductor integrated circuit device
05/29/2001US6239612 Programmable I/O cells with multiple drivers
05/29/2001CA2326962A1 Flexible data structure in an information system having a computer readable medium
05/25/2001WO2001037083A2 Decompression bit processing with a general purpose alignment tool
05/25/2001WO2001037077A1 Device and method for performing a leading zero determination on an operand
05/25/2001WO2001011538A3 Discrete computer system
05/25/2001WO2000041052A8 Method and system for capitalizing a business and maintaining a customer base and/or revenue base
05/24/2001US20010001862 Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith
05/24/2001US20010001861 Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith
05/24/2001US20010001860 Adder and multiplier circuits employing logic gates having discrete, weighted inputs and methods of performing combinatorial operations therewith
05/24/2001US20010001556 Data augmentation system and method
05/23/2001EP1102175A1 Neuro-Fuzzy network architecture with on-line learning capabilities and corresponding control method
05/23/2001EP1102163A2 Microprocessor with improved instruction set architecture
05/23/2001EP1102161A2 Data processor with flexible multiply unit
05/23/2001EP1101162A1 Method and device for generating clock signals
05/23/2001DE19944656A1 Method for improving adjustment in driving stability linked with electronically controlled, infinitely variable change-speed CVT automatic gearboxes includes a driving stability computer and a controller area network
05/23/2001DE19934253A1 Binary arithmetic unit has additional logic stages for improved power handling
05/22/2001US6237085 Processor and method for generating less than (LT), Greater than (GT), and equal to (EQ) condition code bits concurrent with a logical or complex operation
05/22/2001US6237084 Processor which can favorably execute a rounding process composed of positive conversion and saturated calculation processing
05/22/2001US6237083 Microprocessor including multiple register files mapped to the same logical storage and inhibiting sychronization between the register files responsive to inclusion of an instruction in an instruction sequence
05/22/2001US6237075 System and method for generating pseudo-random codes
05/22/2001US6237016 Method and apparatus for multiplying and accumulating data samples and complex coefficients
05/22/2001US6237015 Method for the production of a parameter J0 associated with the implementation of modular operations according to the Montgomery method
05/22/2001US6236981 Transaction system
05/22/2001US6236936 Maintaining a desired separation or distribution in a moving cluster of machines using a time multiplexed global positioning system
05/22/2001US6236909 Method for representing automotive device functionality and software services to applications using JavaBeans
05/22/2001US6236904 Substrate conveying system
05/22/2001US6236686 Data processing equipment and method
05/22/2001US6236232 Multi-purpose transistor array
05/22/2001CA2205525C Multiplier circuit and division circuit
05/17/2001WO2001035573A1 Elliptic curve point ambiguity resolution apparatus and method
05/17/2001WO2001035365A1 Time constrained sensor data retrieval system and method
05/17/2001WO2001035238A1 Method and apparatus for saturated multiplication and accumulation in an application specific signal processor
05/17/2001WO2001035208A1 Method for acquisition of motion capture data
05/17/2001CA2388806A1 Method and apparatus for saturated multiplication and accumulation in an application specific signal processor
05/16/2001EP1099998A2 Coprocessor for synthesizing signals based upon quadratic polynomial sinusoids
05/16/2001EP1099169A1 Method and device for high speed scale conversion
05/16/2001CN1295279A Device and method for execution of stack pull and push-down operation in processing system
05/15/2001US6233707 Method and apparatus that allows the logic state of a logic gate to be tested when stopping or starting the logic gate's clock
05/15/2001US6233672 Piping rounding mode bits with floating point instructions to eliminate serialization
05/15/2001US6233597 Computing apparatus for double-precision multiplication
05/15/2001US6233596 Multiple sum-of-products circuit and its use in electronic equipment and microcomputers
05/15/2001US6233595 Fast multiplication of floating point values and integer powers of two
05/15/2001US6233585 Isolation levels and compensating transactions in an information system
05/15/2001US6233571 Method and apparatus for indexing, searching and displaying data
05/15/2001US6233537 Workflow modeling language
05/15/2001US6233506 Technique for effectively locating an object
05/15/2001US6233191 Field programmable memory array
05/15/2001US6232989 Data augmentation system and method
05/15/2001US6232872 Comparator
05/15/2001US6232820 Method and apparatus for dynamic clock gating
05/15/2001US6232808 Irregular interval timing
05/10/2001WO2001033713A1 Noise code string generator and cn controller comprising it
05/10/2001WO2001033409A2 Computer generated poetry system
05/10/2001WO2001033385A2 Surface computer and computing method using the same
05/10/2001WO2001033335A1 Self-stabilizing, portable and efficient computer arithmetic using mappings of d scale points
05/10/2001WO2001033333A1 Thermal noise random pulse generator and random number generator
05/10/2001WO2001033332A2 Method and apparatus for representing arithmetic intervals within a computer system
05/10/2001WO2001033331A1 Method and processor for reducing computational error in a processor having no rounding support
05/10/2001WO2000074251A3 Method and apparatus for generating random numbers from a communication signal
05/10/2001DE19951816A1 Detecting largest or smallest value of k n-bit data words by outputting 1 or 0 depending on contents of shift register columns and rows
05/10/2001DE19950577A1 Komplexwertige CORDIC-ähnliche Verfahren für Signalverarbeitungsaufgaben Complex-valued CORDIC-like method for signal processing tasks
05/10/2001CA2390478A1 Self-stabilizing, portable and efficient computer arithmetic using mappings of d scale points
05/09/2001EP1097541A1 Timing attack resistant cryptographic system
05/09/2001CN1294828A Method for generating broadcast challenge value
05/08/2001US6230220 Method for allocating either private or shared buffer memory for storing data from sort operations in accordance with an assigned value or threshold value
05/08/2001US6230179 Finite field multiplier with intrinsic modular reduction
05/08/2001US6230178 Method for the production of an error correction parameter associated with the implementation of a modular operation according to the Montgomery method
05/08/2001US6230175 Reconfigurable digit-serial arithmetic system having a plurality of digit-serial arithmetic units
05/08/2001US6229922 Method and apparatus for comparing incoming data with registered data
05/08/2001US6229911 Method and apparatus for providing a bioinformatics database
05/08/2001US6229340 Semiconductor integrated circuit
05/03/2001WO2001031554A1 Threshold comparator
05/03/2001WO2001031436A1 Security method for a cryptographic electronic assembly based on modular exponentiation against analytical attacks
05/03/2001WO2001031435A2 Method for multiplying divisor classes with a scalar
05/03/2001WO2000073872A3 Fft processor with overflow prevention
05/03/2001US20010000661 Logic circuit utilizing capacitive coupling, an AD converter and a DA converter
05/03/2001US20010000652 Output synchronization-free, high-fanin dynamic NOR gate
05/03/2001DE10009451C1 Signal processing device e.g. for digital video signal processing has position shifting devices controlled by shifting instruction dependent on one coded number supplied with second coded number at their setting inputs
05/03/2001CA2389157A1 Method for multiplying divisor classes by a scalar
05/02/2001EP1096746A2 Error estimation function to update a blind equalizer
05/02/2001EP1096506A1 Shift register allowing direct data insertion
05/02/2001EP1096412A1 Comparator
05/02/2001EP1096380A1 Processor