| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 10/03/1995 | US5455943 Method and apparatus for finding longest and closest matching string in history buffer prior to current string |
| 10/03/1995 | US5455942 In a database system |
| 10/03/1995 | US5455941 System for detecting improper rewrites of data system for using separate reader writer passwords |
| 10/03/1995 | US5455925 Data processing device for maintaining coherency of data stored in main memory, external cache memory and internal cache memory |
| 10/03/1995 | US5455924 Apparatus and method for partial execution blocking of instructions following a data cache miss |
| 10/03/1995 | US5455922 Dynamic validity facility for fast purging of translation bypass buffers |
| 10/03/1995 | US5455920 Multiprocessor system having offset address setting |
| 10/03/1995 | US5455919 Installation and use of plural expanded memory managers |
| 10/03/1995 | US5455908 Address formation circuit and method for continuously performing an address-based memory access into a rectangular area |
| 10/01/1995 | CA2145737A1 Distributed database architecture and distributed database management system for open network evolution |
| 09/28/1995 | WO1995026003A1 Database query system |
| 09/27/1995 | EP0674446A2 Reconfigurable data processing stage |
| 09/27/1995 | EP0674443A2 Start code detector for image sequences |
| 09/27/1995 | EP0674442A2 Serial data processing using a pipeline |
| 09/27/1995 | EP0674319A2 Multi-port memory system and its operation method |
| 09/27/1995 | EP0674318A1 System and method for write-protecting predetermined portions of a memory array |
| 09/27/1995 | EP0674290A2 Card type storage medium and card type storage medium issuing apparatus |
| 09/27/1995 | EP0674284A2 Multiple repositories for computer resources, transparent to user |
| 09/27/1995 | EP0674283A2 Ordering and downloading resources from computerized repositories |
| 09/27/1995 | EP0674281A2 Computer system for management of resources |
| 09/27/1995 | EP0674278A2 Document processing apparatus and method therefor |
| 09/27/1995 | EP0674273A1 Atomic operation control scheme |
| 09/27/1995 | EP0674272A1 Queue-based predictive flow control mechanism |
| 09/27/1995 | EP0674271A1 Security aspects of computer resources |
| 09/27/1995 | EP0674270A2 Input/output address translation mechanisms |
| 09/27/1995 | EP0674269A2 Translation mechanism for input/output addresses |
| 09/27/1995 | EP0674268A2 Cache optimization method |
| 09/27/1995 | EP0674267A2 Sub-line cache coherent DMA write transactions |
| 09/27/1995 | EP0674266A2 Method and apparatus for interfacing with ram |
| 09/27/1995 | EP0674263A1 Asynchronous remote data copying |
| 09/27/1995 | EP0674260A2 Transaction processing system |
| 09/27/1995 | EP0674258A1 Device for managing access conflict between a CPU and memories |
| 09/27/1995 | EP0673529A1 A system for relations recovery of a data base in case of errors |
| 09/27/1995 | EP0673528A1 A system for taking backup in a data base |
| 09/27/1995 | EP0673527A1 A method for optimizing memory space in a data base |
| 09/26/1995 | US5454108 Distributed lock manager using a passive, state-full control-server |
| 09/26/1995 | US5454107 Cache memory support in an integrated memory system |
| 09/26/1995 | US5454103 Method and apparatus for file storage allocation for secondary storage using large and small file blocks |
| 09/26/1995 | US5454102 Method and apparatus for transferring structured data using a self-generating node network |
| 09/26/1995 | US5454099 CPU implemented method for backing up modified data sets in non-volatile store for recovery in the event of CPU failure |
| 09/26/1995 | US5454098 Method of emulating access to a sequential access data storage device while actually using a random access storage device |
| 09/26/1995 | US5454096 Storage management system for memory card using memory allocation table |
| 09/26/1995 | US5454093 Buffer bypass for quick data access |
| 09/26/1995 | US5454092 Microcomputer having an improved internal address mapping apparatus |
| 09/26/1995 | US5454091 Virtual to physical address translation scheme with granularity hint for identifying subsequent pages to be accessed |
| 09/26/1995 | US5454039 Software-efficient pseudorandom function and the use thereof for encryption |
| 09/26/1995 | US5454000 Method and system for authenticating files |
| 09/26/1995 | US5453968 Methods of and information recording devices for recording and/or inhibiting recording of an information signal having copy bits with logic values which alternate in accordance with a pattern |
| 09/26/1995 | US5453947 Cache memory system |
| 09/26/1995 | US5453779 Scheduling policies with grouping for providing VCR control functions in a video server |
| 09/25/1995 | CA2244810A1 Method for addressing memory |
| 09/25/1995 | CA2145427A1 Correction for overlapping of start codes during token generation in a data pipeline system |
| 09/25/1995 | CA2145426A1 Pipeline processing machine, related system and multi-standard decoder including reconfigurable processing stages and method relating thereto |
| 09/25/1995 | CA2145424A1 Video formatting apparatus and decoder system and methods relating thereto |
| 09/25/1995 | CA2145423A1 Inverse modeller, system including same, and methods relating thereto |
| 09/25/1995 | CA2145362A1 Method for accessing ram |
| 09/25/1995 | CA2145225A1 Token technique in a pipelined video decompression system |
| 09/25/1995 | CA2145224A1 Apparatus for providing time delay to compressed video information and method relating thereto |
| 09/25/1995 | CA2145221A1 System and apparatus for decoding variable-length video data and methods relating thereto |
| 09/25/1995 | CA2145220A1 Decoder and video apparatus including token generator and methods relating thereto |
| 09/25/1995 | CA2145159A1 Method and apparatus for an inverse quantiser |
| 09/25/1995 | CA2145158A1 Multiple stage pipeline processor including reconfigurable processing stage for processing data having different standards and universal adaptation units and methods relating thereto |
| 09/25/1995 | CA2145157A1 Token technique in a pipelined video decompression system |
| 09/25/1995 | CA2145156A1 Spatial decoder and pipeline machine including same |
| 09/21/1995 | WO1995025394A1 Addressing by means of permutation |
| 09/21/1995 | WO1995025391A1 Method and apparatus for utilizing a token for resource access |
| 09/21/1995 | WO1995025310A1 A peripheral processor card for upgrading a computer |
| 09/21/1995 | WO1995025307A1 Methods and apparatus for increased efficiency bus transactions |
| 09/21/1995 | WO1995025306A2 Distributed shared-cache for multi-processors |
| 09/21/1995 | WO1995025305A1 Improved interleave technique for accessing digital memory |
| 09/21/1995 | WO1995022791A3 Method and apparatus for single cycle cache access on double word boundary cross |
| 09/21/1995 | DE4408543A1 Adressierung durch Permutation Addressing by permutation |
| 09/21/1995 | DE19508489A1 Aufzeichnung von Zeitcode in einer Datenbank Recording Timecode in a database |
| 09/20/1995 | EP0673160A1 Look-ahead scheduling to support video-on-demand applications |
| 09/20/1995 | EP0673159A1 Scheduling policies with grouping for providing VCR control functions in a video server |
| 09/20/1995 | EP0672986A1 System analysis method |
| 09/20/1995 | EP0672985A1 Asynchronous remote data duplexing |
| 09/20/1995 | EP0672984A1 Transaction processing system and method |
| 09/20/1995 | EP0525068A4 Integrated circuit i/o using a high preformance bus interface |
| 09/19/1995 | US5452463 Processor and cache controller interface lock jumper |
| 09/19/1995 | US5452452 System having integrated dispatcher for self scheduling processors to execute multiple types of processes |
| 09/19/1995 | US5452450 System of global update for time/language heterogeneous databases using a relational reference database and both request and database identifier files |
| 09/19/1995 | US5452448 Method of replicate file updating by monitoring file accesses and system therefor |
| 09/19/1995 | US5452447 Computer system |
| 09/19/1995 | US5452445 Two-pass multi-version read consistency |
| 09/19/1995 | US5452440 Method and structure for evaluating and enhancing the performance of cache memory systems |
| 09/19/1995 | US5452431 Microcircuit for a chip card comprising a protected programmable memory |
| 09/19/1995 | US5452430 System and method for storing persistent and non-persistent queued data and for recovering the persistent data responsive to a system restart |
| 09/19/1995 | US5452429 Error correction code on add-on cards for writing portions of data words |
| 09/19/1995 | US5452418 Method of using stream buffer to perform operation under normal operation mode and selectively switching to test mode to check data integrity during system operation |
| 09/19/1995 | US5452357 Method and apparatus for access control and/or identification |
| 09/19/1995 | US5452355 Tamper protection cell |
| 09/19/1995 | CA2041660C Method and system for open file caching in a networked computer system |
| 09/14/1995 | WO1995024685A1 System and method for efficient caching in a distributed file system |
| 09/14/1995 | WO1995024683A1 A virtual memory system that is portable between different cpu types |
| 09/14/1995 | WO1995024682A1 Integrating texture memory and interpolation logic |
| 09/14/1995 | WO1995024678A2 Highly pipelined bus architecture |
| 09/14/1995 | WO1995021407A3 Improved method and apparatus for data access in multiprocessor digital data processing systems |
| 09/13/1995 | EP0671719A1 Transfer processor with transparency |
| 09/13/1995 | EP0671718A1 Guided transfer line drawing |