| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 03/21/1995 | US5400341 Control device for controlling a central processing unit on instantaneous voltage drop |
| 03/21/1995 | US5400293 Method of setting addresses of memories |
| 03/21/1995 | CA2125218A1 Dynamic management of snoop granularity for a coherent asynchronous dma cache |
| 03/21/1995 | CA2066715C Challenge-and-response user authentication protocol |
| 03/16/1995 | DE4432217A1 Clock-synchronous semiconductor memory device |
| 03/16/1995 | DE4431304A1 Construction of a graphic memory for a display system having a plurality of operating modes |
| 03/16/1995 | DE4411449C1 Vehicle security device with electronic use-authorisation coding |
| 03/15/1995 | EP0642690A1 Multi-source video synchronization |
| 03/15/1995 | EP0642686A1 Postmortem finalization |
| 03/15/1995 | EP0642685A1 Improved solid state storage device |
| 03/15/1995 | CN1100219A Equipment for protection of code character of core card |
| 03/14/1995 | US5398334 System for automatic garbage collection using strong and weak encapsulated pointers |
| 03/14/1995 | US5398331 Computer system |
| 03/14/1995 | US5398328 System for obtaining correct byte addresses by XOR-ING 2 LSB bits of byte address with binary 3 to facilitate compatibility between computer architecture having different memory orders |
| 03/14/1995 | US5398325 Methods and apparatus for improving cache consistency using a single copy of a cache tag memory in multiple processor computer systems |
| 03/14/1995 | US5398322 Number theory mapping generator for addressing matrix structures |
| 03/14/1995 | US5398245 Packet processing method and apparatus |
| 03/14/1995 | US5398212 Semiconductor memory device |
| 03/14/1995 | US5398210 Semiconductor memory device having memory cells reorganizable into memory cell blocks different in size |
| 03/14/1995 | CA2034906C Method and apparatus for describing data to be exchanged between processes |
| 03/09/1995 | DE4330468A1 Virtual memory and method of operating it |
| 03/08/1995 | EP0642092A2 Parallel database system |
| 03/08/1995 | EP0642086A1 Virtual address to physical address translation cache that supports multiple page sizes |
| 03/08/1995 | EP0642081A2 Digital storage system and method having alternating deferred updating of mirrored storage disks |
| 03/08/1995 | EP0642079A1 Fault tolerant transaction-oriented data processing |
| 03/08/1995 | EP0642078A2 Method and device for error checking and error correction in memory building blocks |
| 03/08/1995 | EP0574531A4 Cache memory system and method of operating the cache memory system. |
| 03/07/1995 | US5396641 Reconfigurable memory processor |
| 03/07/1995 | US5396637 Data processing system with power-fail protected memory module |
| 03/07/1995 | US5396628 Method of and apparatus for data distribution of processing load |
| 03/07/1995 | US5396620 Method for writing specific values last into data storage groups containing redundancy |
| 03/07/1995 | US5396614 Method and apparatus for a secure protocol for virtual memory managers that use memory objects |
| 03/07/1995 | US5396611 Microprocessor use in in-circuit emulator having function of discriminating user's space and in-circuit emulator space |
| 03/07/1995 | US5396609 Method of protecting programs and data in a computer against unauthorized access and modification by monitoring address regions |
| 03/07/1995 | US5396608 Method and apparatus for accessing variable length words in a memory array |
| 03/07/1995 | US5396605 Buffer storage control apparatus including a translation lookaside buffer and an improved address comparator layout arrangement |
| 03/07/1995 | US5396604 In a computer system |
| 03/07/1995 | US5396471 Data protection circuit |
| 03/07/1995 | US5396470 Monolithically integrated data memory arrangement and method for the operation thereof |
| 03/07/1995 | US5396267 Reconfigurable video game system |
| 03/02/1995 | WO1995006292A1 Method and apparatus for the modeling and query of database structures using natural language-like constructs |
| 03/02/1995 | WO1995006287A1 Data bus |
| 03/02/1995 | DE4429152A1 Microcomputer |
| 03/01/1995 | EP0640980A2 Semiconductor memory having a plurality of banks |
| 03/01/1995 | EP0640979A2 Checkerboard image buffer system |
| 03/01/1995 | EP0640960A2 Interchangeable recording medium and method of controlling same |
| 03/01/1995 | EP0640923A1 System and method to notify an empty status from peer cache units to global storage control unit in a multiprocessor data processing system |
| 03/01/1995 | EP0640922A1 Dynamic random access memory (dram) with cache and tag |
| 03/01/1995 | EP0640921A1 High speed cache miss prediction method and apparatus |
| 03/01/1995 | EP0640916A2 Microcomputer |
| 03/01/1995 | EP0640907A2 Displaying query results |
| 03/01/1995 | EP0640228A1 Method and apparatus for reducing memory wearout in a computer system |
| 03/01/1995 | EP0640227A1 Fault tolerant power supply for an array of storage devices |
| 03/01/1995 | EP0332662B1 Byte write error code method and apparatus |
| 03/01/1995 | CN1099496A Improved recording apparatus and method for an arrayed recording apparatus |
| 03/01/1995 | CN1099492A Processor interface chip for dual-microprocessor processor system |
| 02/28/1995 | US5394555 Multi-node cluster computer system incorporating an external coherency unit at each node to insure integrity of information stored in a shared, distributed memory |
| 02/28/1995 | US5394551 Semaphore mechanism for a data processing system |
| 02/28/1995 | US5394546 Database management system and method of extending system functions |
| 02/28/1995 | US5394545 Computer implemented method |
| 02/28/1995 | US5394541 Programmable memory timing method and apparatus for programmably generating generic and then type specific memory timing signals |
| 02/28/1995 | US5394539 Method and apparatus for rapid data copying using reassigned backing pages |
| 02/28/1995 | US5394538 Memory selection circuit for selecting one of various memory areas in a memory unit based on the capacity and the starting address of each area |
| 02/28/1995 | US5394537 Adaptive page placement memory management system |
| 02/28/1995 | US5394536 Stable memory circuit using dual ported VRAM with shift registers in a multiple memory bank setup for high speed data-transfer |
| 02/28/1995 | US5394535 Memory access control circuit with automatic access mode determination circuitry with read-modify-write and write-per-bit operations |
| 02/28/1995 | US5394533 Cache system having only entries near block boundaries |
| 02/28/1995 | US5394531 Dynamic storage allocation system for a prioritized cache |
| 02/28/1995 | US5394528 Data processor with bus-sizing function |
| 02/28/1995 | US5394469 Method and apparatus for retrieving secure information from mass storage media |
| 02/28/1995 | US5394367 System and method for write-protecting predetermined portions of a memory array |
| 02/28/1995 | US5394366 Enabling data access of a unit of arbitrary number of bits of data in a semiconductor memory |
| 02/25/1995 | CA2127764A1 Displaying query results |
| 02/24/1995 | CA2125201A1 Digital storage system and method having alternating deferred updating of mirrored storage disks |
| 02/23/1995 | WO1995005635A1 Multiple-port shared memory interface and associated method |
| 02/22/1995 | EP0482044B1 Virtual memory for a parallel-computer system |
| 02/22/1995 | EP0404893B1 Electronic document display with annotation routines and multiple windows |
| 02/21/1995 | US5392445 Data storing system and data transfer method with a plurality of disk units |
| 02/21/1995 | US5392443 Vector processor with a memory assigned with skewed addresses adapted for concurrent fetching of a number of vector elements belonging to the same vector data |
| 02/21/1995 | US5392440 Circuit arrangement for operating a computer having a readback device for feeding back last-written information to the computer |
| 02/21/1995 | US5392432 Method for automatic system resource reclamation for object-oriented systems with real-time constraints |
| 02/21/1995 | US5392417 Processor cycle tracking in a controller for two-way set associative cache |
| 02/21/1995 | US5392416 Method and apparatus for controlling one or more hierarchical memories using a virtual storage scheme and physical to virtual address translation |
| 02/21/1995 | US5392415 System for grouping non-contiguous pages belonging to a storage object for page out |
| 02/21/1995 | US5392414 In a computer system |
| 02/21/1995 | US5392413 Record medium reproducing device |
| 02/21/1995 | US5392410 History table for prediction of virtual address translation for cache access |
| 02/21/1995 | US5392408 Address selective emulation routine pointer address mapping system |
| 02/21/1995 | US5392351 Electronic data protection system |
| 02/21/1995 | US5392290 System and method for preventing direct access data storage system data loss from mechanical shock during write operation |
| 02/21/1995 | US5391938 Comparator using XNOR and XOR gates |
| 02/21/1995 | US5390937 Video game apparatus, method and device for controlling same |
| 02/16/1995 | WO1995004969A1 Decentralized telegraphic message processing system |
| 02/16/1995 | WO1995001605A3 Method and system for the link tracking of objects |
| 02/15/1995 | EP0638870A1 Information retrieval method |
| 02/15/1995 | EP0638868A2 A variable accuracy indirect addressing scheme for SIMD multi-processors and apparatus implementing same |
| 02/15/1995 | EP0638865A1 Arrangement for linking a processor to a memory, and system comprising a processor, a memory and an arrangement for linking the processor to the memory |
| 02/15/1995 | EP0638864A1 Development support system for microcomputer with internal cache |
| 02/15/1995 | EP0638188A1 Computer method and apparatus for a table driven file parser. |
| 02/15/1995 | EP0541685B1 Associative memory |