Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
05/1996
05/21/1996US5519842 Method and apparatus for performing unaligned little endian and big endian data accesses in a processing system
05/21/1996US5519839 Double buffering operations between the memory bus and the expansion bus of a computer system
05/21/1996US5519829 Data-array processing and memory systems
05/21/1996US5519664 Dynamic random access memory persistent page implemented as processor register sets
05/21/1996US5519663 Preservation system for volatile memory with nonvolatile backup memory
05/21/1996US5517892 Electonic musical instrument having memory for storing tone waveform and its file name
05/21/1996CA2024174C High performance file system
05/15/1996EP0712130A1 Optical disk write method
05/15/1996EP0712083A1 Memory system comprising parallel connected memory system devices
05/15/1996EP0712082A1 Method and apparatus for adaptive circular predictive buffer management
05/15/1996EP0712067A2 Flash disk card
05/15/1996EP0712065A2 Cyberspace system
05/15/1996EP0711479A1 Cd prom encryption system
05/15/1996EP0711437A1 Low power, high performance, on-chip cache with no stall after a write hit
05/15/1996EP0711436A1 Distributed directory for information stored on audio quality memory devices
05/15/1996EP0480966B1 A fault tolerant data storage system
05/15/1996EP0315209B1 Microcomputer incorporating memory
05/15/1996DE19540915A1 Redundante Anordnung von Festkörper-Speicherbausteinen Redundant array of solid state memory devices
05/14/1996US5517664 RISC system with instructions which include register area and displacement portions for accessing data stored in registers during processing
05/14/1996US5517659 Multiplexed status and diagnostic pins in a microprocessor with on-chip caches
05/14/1996US5517648 Symmetric multiprocessing system with unified environment and distributed system functions
05/14/1996US5517643 Method of allocating memory among a plurality of processes of a computer system
05/14/1996US5517633 System for controlling an internally-installed cache memory
05/14/1996US5517630 Electronic apparatus featuring a plurality of selectable memories
05/14/1996US5517253 Multi-source video synchronization
05/14/1996US5517014 File management apparatus for IC card
05/11/1996CA2162317A1 Redundant array of solid state memory devices
05/09/1996WO1996013921A1 Digital document authentication system for providing a certificate which authenticates and uniquely identifies a document
05/09/1996WO1996013774A1 Multiprocessor system bus protocol for optimized accessing of interleaved storage modules
05/09/1996WO1996013769A1 M & a for dynamically determining and managing connection topology of a hierarchical serial bus assembly
05/09/1996WO1996006390A3 A two-way set-associative cache memory
05/09/1996DE19541675A1 Write-enable, write-protect storage device e.g. for encrypted message
05/08/1996EP0711072A2 Method and system for memory control
05/08/1996EP0710908A2 A co-processor that performs multiple communication tasks on an integrated circuit
05/08/1996EP0710906A1 Reducing bus contention in shared memory
05/08/1996CN1122164A A secure application card for sharing application data and procedures among a plurality of microprocessors
05/08/1996CN1122163A A secure memory card with programmed controlled security access control
05/08/1996CN1122078A Signal transmitting device, circuit block and integrated circuit suited to fast signal transmission
05/08/1996CN1122027A Information processing system and method of operation
05/07/1996US5515532 File management system for memory card
05/07/1996US5515531 Parallel database processing system and retrieval method using secondary key
05/07/1996US5515529 Central processor with duplicate basic processing units employing multiplexed data signals to reduce inter-unit conductor count
05/07/1996US5515525 Emulating the memory functions of a first system on a second system
05/07/1996US5515522 Computing system
05/07/1996US5515519 Data processor and method utilizing coded no-operation instructions
05/07/1996US5515514 Peripheral processor card for upgrading a computer
05/07/1996US5515500 Recording apparatus and method for an arrayed recording apparatus
05/07/1996US5515498 Optoelectronic computer graphics system and method
05/07/1996US5515492 User interface between a server and workstations of a transactional processing system
05/07/1996US5515333 Semiconductor memory
05/07/1996CA2051209C Consistency protocols for shared memory multiprocessors
05/02/1996WO1996013005A1 Data storage device
05/02/1996WO1996013004A1 Error correction method and apparatus for disk drive emulator
05/02/1996WO1996013003A1 An efficient method for obtaining usable parts from a partially good memory integrated circuit
05/02/1996WO1996007140A3 Data storage cache system
05/02/1996DE19540428A1 Design for information security systems
05/02/1996DE19538961A1 Data storage device using cache memory
05/02/1996CA2146489A1 Stream buffers for high-performance computer memory systems
05/01/1996EP0709786A1 Semiconductor memory with a timing controlled for receiving data at a semiconductor memory module to be accessed
05/01/1996EP0709782A2 Error detection system for mirrored memory between dual disk storage controllers
05/01/1996EP0709776A1 Method for detecting and correcting an error in a multilevel memory and memory device implementing the method
05/01/1996EP0709770A2 Apparatus to control load/store instructions
05/01/1996EP0709765A2 Method and system for selecting data for migration in a hierarchic data storage system using frequency distribution tables
05/01/1996EP0708942A1 Method and structure for evaluating and enhancing the performance of cache memory systems
05/01/1996EP0516900B1 Data backup and recovery in a data processing system
05/01/1996EP0386462B1 Fault tolerant memory systems
05/01/1996CN1121544A Embroidery data storing device
04/1996
04/30/1996US5513353 Cache control system which permanently inhibits local but not global parameter data writes to main memory
04/30/1996US5513352 Electronic musical instrument having secondary storage of files with common constituent portions identified by entry name
04/30/1996US5513350 Update constraints in transactions which may abort
04/30/1996US5513348 System for relational database retrieval through a link file built to access components of relational tables
04/30/1996US5513344 Method of testing cache memories used for an information processing apparatus
04/30/1996US5513337 System for protecting unauthorized memory accesses by comparing base memory address with mask bits and having attribute bits for identifying access operational mode and type
04/30/1996US5513336 System and method for determining when and what position in cache memory to store data elements utilizing least and last accessed data replacement method
04/30/1996US5513335 Cache tag memory having first and second single-port arrays and a dual-port array
04/30/1996US5513333 Circuitry and method for programming and erasing a non-volatile semiconductor memory
04/30/1996US5513331 Method and apparatus for automatically configuring system memory address space of a computer system having a memory subsystem with indeterministic number of memory units of indeterministic sizes during system reset
04/30/1996US5513327 Integrated circuit I/O using a high performance bus interface
04/30/1996US5513325 Technique for coupling CTOS units to non-CTOS host
04/30/1996US5513323 Method and apparatus for multistage document format transformation in a data processing system
04/30/1996US5513314 Computer system
04/30/1996US5513143 Data cache memory internal circuitry for reducing wait states
04/30/1996US5513138 Memory card having a plurality of EEPROM chips
04/30/1996US5512851 For processing data
04/30/1996CA2064272C Circuit managing numbers of accesses to logic resources
04/30/1996CA2030888C Cache data consistency mechanism for workstations and servers with an i/o cache
04/25/1996WO1996012286A1 Multi-port memory device with multiple sets of columns
04/25/1996WO1996012231A1 A translation buffer for detecting and preventing conflicting virtual addresses from being stored therein
04/25/1996WO1996012230A1 System and method for processing of memory data and communication system comprising such system
04/25/1996WO1996012229A1 Indexing and multiplexing of interleaved cache memory arrays
04/25/1996WO1996012227A1 An address queue capable of tracking memory dependencies
04/25/1996DE19535100A1 Image processing device e.g. for video conferencing system
04/25/1996CA2202863A1 System and method for processing of memory data and communication system comprising such system
04/24/1996EP0708429A1 Storage control system for prohibiting rewriting in a determined storage area
04/24/1996EP0708404A2 Interleaved data cache array having multiple content addressable fields per cache line
04/24/1996EP0707765A1 A method of detecting changes to a collection of digital signals
04/24/1996EP0707726A1 Memory control device for an assay apparatus
04/24/1996EP0707725A1 Database structures
04/24/1996EP0707724A1 Data management using nested records and code points
04/24/1996EP0436559B1 Data processing network
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