Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
11/1995
11/02/1995EP0679978A1 Method and apparatus enabling software trial using a decryption stub
11/02/1995EP0679977A1 Method and apparatus enabling software trial allowing the distribution of software objects
11/02/1995EP0679273A1 Shared library locating system.
11/02/1995EP0679270A1 A method and system for maintaining access security of input and output operations in a computer system
11/02/1995CA2164596A1 Data protection system
10/1995
10/31/1995US5463776 Storage management system for concurrent generation and fair allocation of disk space among competing requests
10/31/1995US5463770 System and method for controlling data storage in a data processing system in which objects generated within a lower level language program are associated with memory slots allocated to another program
10/31/1995US5463759 Memory management apparatus
10/31/1995US5463757 Command interface between user commands and a memory device
10/31/1995US5463756 Memory control unit and associated method for changing the number of wait states using both fixed and variable delay times based upon memory characteristics
10/31/1995US5463755 High-performance, multi-bank global memory card for multiprocessor systems
10/31/1995US5463753 Method and apparatus for reducing non-snoop window of a cache controller by delaying host bus grant signal to the cache controller
10/31/1995US5463751 Memory device having address translator and comparator for comparing memory cell array outputs
10/31/1995US5463750 Method and apparatus for translating virtual addresses in a data processing system having multiple instruction pipelines and separate TLB's
10/31/1995US5463739 Apparatus for vetoing reallocation requests during a data transfer based on data bus latency and the number of received reallocation requests below a threshold
10/31/1995US5463737 Instruction buffer controller in processor enabling direct refetching of an instruction
10/31/1995US5463735 Method of downloading information stored in an arching device to destination network controller through intermediate network controllers in accordance with routing information
10/31/1995US5463733 Failure recovery apparatus and method for distributed processing shared resource control
10/31/1995US5463590 Multi-bank semiconductor memory device having common command detection
10/31/1995US5463589 Method and system for automatic configuration of memory devices
10/31/1995US5463381 Database system having a plurality of nodes communicating with each other via communication network
10/26/1995WO1995028678A1 Cache memory device for data storage
10/26/1995WO1995028677A1 Efficient addressing of large memories
10/26/1995WO1995028674A2 Method and device to control a memory
10/26/1995WO1995028669A2 System memory unit and method in a computer using extended data out (edo) dram
10/26/1995DE4429433C1 Address association method for modular stored program controller
10/26/1995DE19512745A1 Cache-Speichervorrichtung zum Speichern von Daten Cache memory means for storing data
10/26/1995DE19504483A1 Cache-Speichervorrichtung zum Speichern von Daten Cache memory means for storing data
10/25/1995EP0678812A1 Replication verification
10/25/1995EP0458926B1 Dual port, dual speed image memory access arrangement
10/25/1995CN1110812A Recording apparatus
10/24/1995US5461721 System for transferring data between I/O devices and main or expanded storage under dynamic control of independent indirect address words (IDAWs)
10/24/1995US5461718 System for sequential read of memory stream buffer detecting page mode cycles availability fetching data into a selected FIFO, and sending data without aceessing memory
10/24/1995US5461712 In a computer graphics system
10/24/1995US5461415 Look-ahead scheduling to support video-on-demand applications
10/22/1995CA2121822A1 Computer software protection device
10/20/1995EP0688450A4 Flash file system
10/19/1995WO1995027941A1 Updating and restoration method of system file
10/19/1995WO1995019601A3 Optimized database management system
10/18/1995EP0677200A1 Method for increasing the rate of scrolling in a frame buffer
10/18/1995EP0677199A1 Method and apparatus for providing operations affecting a frame buffer without a row address strobe cycle
10/18/1995EP0677192A1 Multiple block mode operations in a frame buffer system designed for windowing operations
10/18/1995EP0677190A1 Frame buffer system designed for windowing operations
10/18/1995EP0677189A1 Architecture of output switching circuitry for frame buffer
10/18/1995EP0651889A4 Illumination system and method for a high definition light microscope.
10/18/1995CN1110488A Data writing to non-volatile memory
10/18/1995CN1110456A Interactive video on demand network
10/18/1995CN1030115C Multi-bit vector for page aging
10/17/1995US5459856 System having independent access paths for permitting independent access from the host and storage device to respective cache memories
10/17/1995US5459854 Method for optimizing software for any one of a plurality of variant architectures
10/17/1995US5459852 Cache bypass system with simultaneous initial transfer of target data to both processor and cache
10/17/1995US5459851 Dual-port memory with selective read data output prohibition
10/17/1995US5459849 Method and apparatus for compressing cacheable data
10/17/1995US5459846 Computer architecture system having an imporved memory
10/17/1995US5459842 System for combining data from multiple CPU write requests via buffers and using read-modify-write operation to write the combined data to the memory
10/17/1995US5459834 Graphic pattern storage device using FIFO with feedback between storage stages
10/17/1995US5459691 Memory circuit
10/17/1995US5459487 For a personal computer
10/17/1995US5459416 Sense amplifier common mode dip filter circuit to avoid false misses
10/12/1995WO1995027250A1 Protection circuit for a microprocessor
10/12/1995WO1995024678A3 Highly pipelined bus architecture
10/12/1995WO1995003568A3 Write back cache controller method and apparatus for use in a system having a cpu with internal cache memory
10/11/1995EP0676698A1 Address translation circuit
10/11/1995EP0676690A1 Delayed write of store instruction in processor device
10/11/1995EP0676081A1 Pattern search and refresh logic in dynamic memory
10/11/1995EP0676069A1 File translation system
10/11/1995EP0606368A4 Packet processing method and apparatus.
10/11/1995EP0348616B1 Storage subsystem including an error correcting cache
10/11/1995CN1110066A Place object system
10/11/1995CN1110065A Document framework system
10/11/1995CN1030019C Associative memory
10/11/1995CN1030018C Bit storage cell in memory
10/10/1995US5457796 for use in a computer system
10/10/1995US5457793 Software cache management of a shared electronic store in a supplex
10/10/1995US5457789 Method and apparatus for performing memory protection operations in a single instruction multiple data system
10/10/1995US5457788 Associative memory system for performing hit judgment on cache data
10/10/1995US5457746 System and method for access control for portable data storage media
10/10/1995US5457668 Data processing system with collating processing at start up for determining the presence of an improper optical CD
10/10/1995US5457660 Reset signal generation circuit having a function for protecting write data
10/10/1995US5457658 For controlling a data processing system
10/10/1995CA2040322C Asynchronous resynchronization of a commit procedure
10/10/1995CA2026224C Apparatus for maintaining consistency in a multiprocess computer system using virtual caching
10/10/1995CA2022529C Apparatus for page tagging in a computer system
10/05/1995DE19508288A1 Prevention of unauthorised access to computer system
10/04/1995EP0675502A2 Multiple sector erase flash EEPROM system
10/04/1995EP0675499A2 Memory structure with multiple integrated memory array portions
10/04/1995EP0675478A1 Multimedia graphics system
10/04/1995EP0675451A2 A distributed database architecture and distributed database management system for open network evolution
10/04/1995EP0675443A1 Apparatus and method for accessing direct mapped cache
10/04/1995EP0675442A1 Returned electronic memory retrieval
10/04/1995EP0675437A2 Self-testing secure-transaction computer input-output bus
10/04/1995EP0675436A1 Recoverable set associative cache
10/04/1995EP0675429A2 Data handling apparatus
10/04/1995EP0674786A1 Arrangement with plug-in functional units.
10/04/1995CN1109610A A method of requesting data and apparatus therefor
10/04/1995CN1109609A Selective inhibit/enable read/write device for high speed auxiliary storage
10/03/1995US5455957 Method and apparatus for conducting bus transactions between two clock independent bus agents of a computer system using a transaction by transaction deterministic request/response protocol
10/03/1995US5455948 Method and system for providing data to an application program
10/03/1995US5455947 Log file control system in a complex system
10/03/1995US5455946 Method and means for archiving modifiable pages in a log based transaction management system
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