Patents
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
02/1996
02/13/1996US5491811 Cache system using mask bits to recorder the sequences for transfers of data through cache to system memory
02/13/1996US5491810 Method and system for automated data storage system space allocation utilizing prioritized data set parameters
02/13/1996US5491808 Method for tracking memory allocation in network file server
02/13/1996US5491807 System and method for worm volume management of new and updated data files using variable threshold block addresses
02/13/1996US5491806 Optimized translation lookaside buffer slice having stored mask bits
02/11/1996CA2144563A1 System for preventing use of unauthorized software with firmware device
02/08/1996WO1996003704A1 Computer method and apparatus for asynchronous ordered operations
02/08/1996WO1995034155A3 A method for storing and retrieving data and a memory arrangement
02/07/1996EP0696121A1 Method and system for ensuring royalty payments for data delivered over a network
02/07/1996EP0696023A2 Interface controller for frame buffer random access memory devices
02/07/1996EP0695996A1 Multi-level cache system
02/07/1996EP0695988A2 A first-in first-out memory
02/07/1996EP0695986A1 System for providing access protection on media storage devices
02/07/1996EP0695444A1 Multi-phase multi-access pipeline memory system
02/07/1996EP0695443A1 Remote data mirroring
02/07/1996EP0444088B1 Data flow multiprocessor system
02/07/1996EP0394436B1 Automatically variable memory interleaving system
02/07/1996CN1116341A Copy-proof chaos software security card
02/07/1996CN1030940C Battery charge monitor for personal computer
02/06/1996US5490274 Modified buddy system for managing disk space
02/06/1996US5490263 Multiported buffer memory system for disk drive complex
02/06/1996US5490262 Dual cache memory device with cache monitoring
02/06/1996US5490261 Interlock for controlling processor ownership of pipelined data for a store in cache
02/06/1996US5490260 Solid-state RAM data storage for virtual memory computer using fixed-sized swap pages with selective compressed/uncompressed data store according to each data size
02/06/1996US5490259 Logical-to-real address translation based on selective use of first and second TLBs
02/06/1996US5490253 Multiprocessor system using odd/even data buses with a timeshared address bus
02/06/1996US5490248 Disk array system having special parity groups for data blocks with high update activity
02/06/1996US5490125 Recording system for a singalong disc player
02/06/1996US5490118 Multiple power source memory control circuit for memory devices
02/06/1996US5490112 Multi-port memory device with multiple sets of columns
02/06/1996US5490064 Control unit for vehicle and total control system therefor
02/06/1996US5489103 Interactive communication system for communicating video game and karaoke software
02/06/1996CA2150151A1 First-in first-out memory
02/06/1996CA2009549C Providing additional system characteristics to a data processing system
02/01/1996WO1996002931A1 Multiple user data storage, retrieval and distribution system
02/01/1996WO1996002917A1 Testing of memory content
02/01/1996DE4427108A1 Kraftfahrzeug-Steuergerät Motor vehicle control device
02/01/1996DE19524925A1 Address conversion system for memory management unit
02/01/1996CA2194289A1 Testing of memory content
01/1996
01/31/1996EP0695098A2 Coded data control device
01/31/1996EP0695095A2 Video decompression
01/31/1996EP0694879A2 Efficient methods for the evaluation of a graphical programming language
01/31/1996EP0694845A1 Low-latency memory indexing method and structure
01/31/1996EP0694844A1 Reduced memory pin addressing for cache and main memory
01/31/1996EP0694843A1 Method for controlling a sequence of processor accesses to an associated memory
01/31/1996EP0694842A1 Method and device for securing the flow of linear sequences of orders executed by a processor
01/31/1996EP0694840A2 Motor vehicle controller using electrically erasable and programmable memory
01/31/1996EP0694839A2 Distributed systems with replicated files
01/31/1996EP0694831A2 Computer system having storage unit provided with data compression function andmethod of management of storage area thereof
01/31/1996EP0694830A1 Buffering for load balancing in on-demand video servers
01/31/1996EP0694828A2 Data processor with secure communication
01/31/1996CN1115952A Look-ahead scheduling to support viedo-on-demand applications
01/31/1996CN1115941A Memory apparatus for channel selector of television (hereinafter called TV) receiver
01/31/1996CN1115893A Computer index memory with shared cache subsystem
01/31/1996CN1115892A Cache controller in computer system
01/31/1996CN1115891A Single write structure in cache of computer system
01/31/1996CN1030868C Adapter for constructing redundant disk storage system
01/30/1996US5488722 System and method for automating implementation and execution of constraint most likely to be violated in a database
01/30/1996US5488721 System and method for applying visitor lock and persistent lock flags to control units of work boundaries in an object oriented environment
01/30/1996US5488720 Apparatus with deletion safeguard for setting a number of data in temporary deletion state and independently releasing or deleting any one of the data
01/30/1996US5488712 Memory circuit with pipeline processing
01/30/1996US5488711 Serial EEPROM device and associated method for reducing data load time using a page mode write cache
01/30/1996US5488709 Cache including decoupling register circuits
01/30/1996US5488708 Memory management in an image processing apparatus with detachable memory
01/30/1996US5488707 Apparatus for predicting overlapped storage operands for move character
01/30/1996US5488701 In log sparing for log structured arrays
01/30/1996CA2154962A1 Video decompression
01/30/1996CA2045226C Nonvolatile memory management in a data processing network
01/30/1996CA2000180C Cache unit capable of efficiently insuring cache coherence
01/25/1996WO1996002035A1 Process for converting a virtual address into a real address
01/24/1996EP0693728A1 Method and apparatus for management of mapped and unmapped regions of memory in a microkernel data processing system
01/24/1996EP0693727A1 Information storage device comprising a magnetic tape recorder and a hard disc drive
01/24/1996EP0693197A1 Document framework system
01/24/1996EP0693194A1 Place object display system
01/23/1996US5487162 Cache lock information feeding system using an address translator
01/23/1996US5487161 Computerized data terminal with switchable memory address for start-up and system control instructions
01/23/1996US5487041 For increasing the operating speed of a cache memory
01/23/1996US5487024 Data processing system for hardware implementation of square operations and method therefor
01/23/1996US5486687 For a microcomputer
01/18/1996WO1996001450A1 Security system for software
01/18/1996WO1995034030A3 Flash memory based main memory
01/17/1996EP0692764A1 Memory throttle for PCI master
01/17/1996EP0692114A1 Time-based script sequences
01/17/1996EP0418220B1 Destination control logic for arithmetic and logic unit for digital data processor
01/17/1996CN1115106A Semiconductor intergral circuit
01/17/1996CN1115101A 半导体存储器 Semiconductor memory
01/17/1996CN1115059A Method and apparatus for enabling trial period use of software products: method and apparatus for allowing a try-and-buy user interaction
01/17/1996CN1115058A Protected programmable memory cartridge and computer system using same
01/16/1996US5485613 Method for automatic memory reclamation for object-oriented systems with real-time constraints
01/16/1996US5485610 Physical database design system
01/16/1996US5485609 Online background predictors and prefetchers for locality management
01/16/1996US5485598 Redundant disk array (raid) system utilizing separate cache memories for the host system and the check data
01/16/1996US5485595 Flash memory mass storage architecture incorporating wear leveling technique without using cam cells
01/16/1996US5485593 Data structure access control circuit and method utilizing tag bits indicating address match and memory fullness conditions
01/16/1996US5485592 Write back cache controller method and apparatus for use in a system having a CPU with internal cache memory
01/16/1996US5485589 Memory subsystem
01/16/1996US5485588 Memory array based data reorganizer
01/16/1996US5485428 Memory device with page select capability
01/16/1996US5485418 Associative memory
01/16/1996CA2052302C Prevention of inspection of secret data stored in encapsulated integrated circuit chip