Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
11/1995
11/28/1995US5471415 Cache tag memory
11/28/1995CA2150285A1 Processor performance optimizing device
11/28/1995CA2146690A1 Update constraints in transactions which may abort
11/26/1995CA2149823A1 Automatic addressing of information bus devices
11/23/1995WO1995031787A1 Method and apparatus for handling requests regarding information stored in a file system
11/23/1995WO1995031786A1 Computer-based information access method and apparatus to permit sql-based manipulation of programming language-specific data files
11/23/1995WO1995031783A1 Data storage device
11/23/1995DE19507330A1 Detector for input=output states of first-in-first-out memory
11/22/1995EP0683492A2 Storage reading apparatus
11/22/1995EP0683459A1 Coherent transaction ordering in multi-tiered bus system
11/22/1995EP0683458A1 Programmable content mode level two cache
11/22/1995EP0683457A1 A computer system including a snoop control circuit
11/22/1995EP0683456A1 Fault-tolerant computer system with online reintegration and shutdown/restart
11/22/1995EP0683453A1 Multi-processor system, disk controller using the same and non-disruptive maintenance method thereof
11/22/1995EP0683452A1 Partitioned log-structured file system and methods for operating same
11/22/1995EP0483174B1 A method of operating a data processing system
11/22/1995EP0359815B1 Cache with at least two fill sizes
11/22/1995CN1112273A Disc recording apparatus and file management method
11/21/1995US5469568 Method for choosing largest selectivities among eligible predicates of join equivalence classes for query optimization
11/21/1995US5469567 System for secondary database data block buffering with block save generations and read/write access and with separate management
11/21/1995US5469564 Data storage device with enhanced data security
11/21/1995US5469560 Prioritizing pending read requests in an automated storage library
11/21/1995US5469559 Method and apparatus for refreshing a selected portion of a dynamic random access memory
11/21/1995US5469558 Dynamically reconfigurable memory system with programmable controller and FIFO buffered data channels
11/21/1995US5469556 Resource access security system for controlling access to resources of a data processing system
11/21/1995US5469555 Adaptive write-back method and apparatus wherein the cache system operates in a combination of write-back and write-through modes for a cache-based microprocessor system
11/21/1995US5469554 Detecting the presence of a device on a computer system bus by altering the bus termination
11/21/1995US5469551 Method and apparatus for eliminating branches using conditional move instructions
11/21/1995US5469548 Disk array controller having internal protocol for sending address/transfer count information during first/second load cycles and transferring data after receiving an acknowldgement
11/21/1995US5469453 Data corrections applicable to redundant arrays of independent disks
11/21/1995US5469449 FIFO buffer system having an error detection and resetting unit
11/21/1995US5469390 Semiconductor memory system with the function of the replacement to the other chips
11/21/1995US5469228 Memory address and display control apparatus for high definition television
11/21/1995US5468992 Electronic circuit package including plural bare chips mounted on a single wiring substrate
11/21/1995CA2042515C Cache memory exchange protocol
11/21/1995CA2030940C Computer controlled optimized pairing of disk units
11/21/1995CA2007742C High performance memory system
11/20/1995CA2142799A1 Integrated level two cache and memory controller with multiple data ports
11/16/1995WO1995030988A1 A single chip controller-memory device and a memory architecture and methods suitable for implementing the same
11/16/1995WO1995030969A1 Computer graphics system having high performance multiple layer z-buffer
11/16/1995WO1995030959A1 Data management system
11/16/1995WO1995030955A1 Data management system for a real-time system
11/16/1995WO1995030954A1 Data cache
11/15/1995EP0682318A1 Database management system
11/15/1995EP0682315A1 Method of unlocking access to a computer using a remote file loading unit
11/15/1995EP0682306A2 Data storage system and method
11/15/1995EP0567474B1 Method and apparatus for access control and/or identification
11/14/1995US5467461 Multiprocessor computer system having bus control circuitry for transferring data between microcomputers
11/14/1995US5467460 M&A for minimizing data transfer to main memory from a writeback cache during a cache miss
11/14/1995US5467459 Imaging and graphics processing system
11/14/1995US5467455 Data processing system and method for performing dynamic bus termination
11/14/1995US5467361 Method and system for separate data and media maintenance within direct access storage devices
11/14/1995US5467318 Address generating and decoding apparatus with high operation speed
11/14/1995US5467266 Motor-operated window cover
11/14/1995US5467169 Image forming apparatus which can prevent copying during a predetermined period and allow copying at other times
11/14/1995US5467081 Datacarriers with separate storage of read and write-inhibited memory locations
11/14/1995CA2027779C Data retrieval system for relational database
11/14/1995CA2024125C Dynamic volume tracking in an installable file system
11/09/1995WO1995030126A1 Assessment of distance
11/09/1995DE4345320A1 Disk array appts. - has cache memory for storing data and redundant information, and non-volatile memory which stores data even if power supply fails
11/09/1995DE19511770A1 Kopräsenz-Datensuchsystem Co-presence data search system
11/08/1995EP0681282A2 Flexible DRAM access in a frame buffer memory and system
11/08/1995EP0681267A2 Image generation architecture employing tri-level fixed interleave processing and distribution buses
11/08/1995EP0681242A1 Secure access method for removable cards for computers
11/08/1995EP0681241A1 Processor board having a second level writeback cache system and a third level writethrough cache system which stores exclusive state information for use in a multiprocessor computer system
11/08/1995EP0681240A2 Duplicate cache tag memory system
11/08/1995EP0681239A2 Fault-tolerant computer system with I/O function capabilities
11/08/1995EP0681238A1 Raid level 5 with free blocks parity cache
11/08/1995EP0681233A1 Method and apparatus enabling software trial using an encryption header
11/08/1995EP0680651A1 Pipeline read write operations in a high speed frame buffer system
11/08/1995EP0680635A1 Method and apparatus for data transfer and storage in a highly parallel computer network environment.
11/08/1995EP0680634A1 Apparatus and method for backing up data from networked computer storage devices.
11/08/1995CN1111375A 信息处理系统 The information processing system
11/07/1995US5465365 Apparatus and methods for making a portion of a first name space available as a portion of a second name space
11/07/1995US5465360 Computer system
11/07/1995US5465350 Management method
11/07/1995US5465349 System for monitoring abnormal integrated circuit operating conditions and causing selective microprocessor interrupts
11/07/1995US5465344 Microprocessor with dual-port cache memory for reducing penalty of consecutive memory address accesses
11/07/1995US5465343 Shared memory array for data block and control program storage in disk drive
11/07/1995US5465342 Dynamically adaptive set associativity for cache memories
11/07/1995US5465341 Verifiable security circuitry for preventing unauthorized access to programmed read only memory
11/07/1995US5465337 Method and apparatus for a memory management unit supporting multiple page sizes
11/07/1995US5465328 Fault-tolerant transaction-oriented data processing
11/07/1995US5465229 Single in-line memory module
11/07/1995US5465224 Three input arithmetic logic unit forming the sum of a first Boolean combination of first, second and third inputs plus a second Boolean combination of first, second and third inputs
11/05/1995CA2148186A1 Processor board having a second level writeback cache system and a third level writethrough cache system which stores exclusive state information for use in a multiprocessor computer system
11/04/1995CA2146697A1 Image generation architecture employing tri-level fixed interleave processing and distribution buses
11/02/1995WO1995029450A1 Data storage
11/02/1995WO1995029446A1 Method for allocation of address space in a virtual memory system
11/02/1995WO1995029445A1 Cache storage device for data storage
11/02/1995WO1995029444A1 Information memory processor
11/02/1995WO1995029438A1 Data protection system
11/02/1995WO1995025306A3 Distributed shared-cache for multi-processors
11/02/1995EP0680236A1 Apparatus for swapping input values into corresponding output values
11/02/1995EP0680220A1 Apparatus and method for addressing a cache-memory of a moving picture compression circuit
11/02/1995EP0680000A1 Data store access in an object oriented environment
11/02/1995EP0679997A1 Data processing system having a function of data transfer between microprocessor and memory in burst mode
11/02/1995EP0679983A2 Expansion device with suspend/resume function
11/02/1995EP0679980A1 Method and apparatus enabling software trial with computer-dependent identification
11/02/1995EP0679979A1 Method and apparatus enabling software trial with a try-and-buy user interaction
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