| Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539) |
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| 09/11/1996 | EP0424031B1 Method and system for dynamically controlling the operation of a program |
| 09/11/1996 | EP0422113B1 Multi-processor system with cache memories |
| 09/11/1996 | CN1130773A Data file update processing apparatus |
| 09/10/1996 | US5555560 For a data processing system |
| 09/10/1996 | US5555559 Microprocessor capable of ensuring flexible recovery time for I/O device by inserting idle states |
| 09/10/1996 | US5555528 Dynamic random access memory persistent page implemented as processor register sets |
| 09/10/1996 | US5555515 Apparatus and method for generating linearly filtered composite signal |
| 09/10/1996 | US5555434 Computing device employing a reduction processor and implementing a declarative language |
| 09/10/1996 | US5555427 Distributed processing in a system of computers at terminals connected by a communication network |
| 09/10/1996 | US5555424 Extended Harvard architecture computer memory system with programmable variable address increment |
| 09/10/1996 | US5555423 Multi-mode microprocessor having a pin for resetting its register without purging its cache |
| 09/10/1996 | US5555405 Method and apparatus for free space management in a forwarding database having forwarding entry sets and multiple free space segment queues |
| 09/10/1996 | US5555404 Continuously available database server having multiple groups of nodes with minimum intersecting sets of database fragment replicas |
| 09/10/1996 | US5555402 A disk storage subsystem for interfacing with a parallel path, a nonvolatile media and a volatile storage medium |
| 09/10/1996 | US5555400 Method and apparatus for internal cache copy |
| 09/10/1996 | US5555399 Dynamic idle list size processing in a virtual memory management operating system |
| 09/10/1996 | US5555398 For a computer |
| 09/10/1996 | US5555395 System for memory table cache reloads in a reduced number of cycles using a memory controller to set status bits in the main memory table |
| 09/10/1996 | US5555394 Data processor with the ability of fast partial clearing of buffer memory |
| 09/10/1996 | US5555393 Method and apparatus for a cache memory with data priority order information for individual data entries |
| 09/10/1996 | US5555392 Method and apparatus for a line based non-blocking data cache |
| 09/10/1996 | US5555391 System and method for storing partial blocks of file data in a file cache system by merging partial updated blocks with file block to be written |
| 09/10/1996 | US5555389 Storage controller for performing dump processing |
| 09/10/1996 | US5555387 Method and apparatus for implementing virtual memory having multiple selected page sizes |
| 09/10/1996 | US5555385 Allocation of address spaces within virtual machine compute system |
| 09/10/1996 | US5555382 In a multiprocessor system |
| 09/10/1996 | US5555379 Cache controller index address generator |
| 09/10/1996 | US5555304 Storage medium for preventing an illegal use by a third party |
| 09/09/1996 | CA2170552A1 Method and apparatus for vector quantization caching in a real time video coder |
| 09/06/1996 | WO1996027161A1 Method for processing and accessing data objects, particularly documents, and system therefor |
| 09/06/1996 | WO1996027155A2 Systems and methods for secure transaction management and electronic rights protection |
| 09/06/1996 | CA2683230A1 Systems and methods for secure transaction management and electronic rights protection |
| 09/05/1996 | DE19546808C1 Memory device for processing digital video signals |
| 09/04/1996 | EP0730274A2 Compact disc recording system and method |
| 09/04/1996 | EP0730240A2 System and method for accessing data in a database |
| 09/04/1996 | EP0730227A1 System and method for a distributed debugger for debugging distributed application programs |
| 09/04/1996 | EP0729618A1 Network management system having virtual catalog overview of files distributively stored across network domain |
| 09/04/1996 | EP0729614A1 A method and a device for storing information, in particular pin codes |
| 09/04/1996 | EP0729613A1 Microcontroller conditionally skips updating latch for msb and directly drives lsb of memory address |
| 09/04/1996 | EP0729612A1 Microcontroller having a page address mode |
| 09/04/1996 | EP0729604A1 Register status protection during read-modify-write operation |
| 09/04/1996 | CA2170724A1 System and method for a distributed debugger for debugging distributed application programs |
| 09/03/1996 | US5553307 Method and device for transferring noncontiguous blocks in one transfer start by creating bit-map indicating which block is to be transferred |
| 09/03/1996 | US5553285 In a data processing system |
| 09/03/1996 | US5553278 In a computer system |
| 09/03/1996 | US5553270 Apparatus for providing improved memory access in page mode access systems with pipelined cache access and main memory address replay |
| 09/03/1996 | US5553266 Computer apparatus |
| 09/03/1996 | US5553265 Methods and system for merging data during cache checking and write-back cycles for memory reads and writes |
| 09/03/1996 | US5553264 Method and apparatus for efficient cache refilling by the use of forced cache misses |
| 09/03/1996 | US5553263 In a computer system |
| 09/03/1996 | US5553262 Memory apparatus and method capable of setting attribute of information to be cached |
| 09/03/1996 | US5553261 Method of performing clean-up of a solid state disk while executing a read command |
| 09/03/1996 | US5553259 Apparatus and method for synchronizing the simultaneous loading of cache program word addresses in dual slice registers |
| 09/03/1996 | US5553258 Method and apparatus for forming an exchange address for a system with different size caches |
| 09/03/1996 | US5553254 Instruction cache access and prefetch process controlled by a predicted instruction-path mechanism |
| 09/03/1996 | US5553249 Dual bus adaptable data path interface system |
| 09/03/1996 | US5553244 Reflexively sizing memory bus interface |
| 09/03/1996 | US5553231 Fault tolerant memory system |
| 09/03/1996 | US5553230 Identifying controller pairs in a dual controller disk array |
| 09/03/1996 | US5553218 Graphical user interface for relating key index properties to database table columns |
| 09/03/1996 | US5553216 Structured database system together with structure definition frame storing document body data |
| 09/03/1996 | US5553082 Built-in self-test for logic circuitry at memory array output |
| 09/03/1996 | US5553023 In a computer system |
| 09/03/1996 | US5552991 Control system for an electronic pastage meter having a programmable application specific intergrated circuit |
| 09/03/1996 | US5551701 Reconfigurable video game controller with graphical reconfiguration display |
| 09/03/1996 | CA2010700C Encryption / decryption apparatus for a computer |
| 08/29/1996 | WO1996026487A1 Method for manipulating disk partitions |
| 08/29/1996 | DE19506921A1 Comparing secret codes with portable data carrier supported by microprocessor for The comparison is intended to identify users. |
| 08/28/1996 | EP0729107A1 Computer archive storage |
| 08/28/1996 | EP0729103A2 Method and apparatus for implementing non-faulting load instruction |
| 08/28/1996 | EP0729102A2 Cachability attributes for virtual addresses in virtually and physically indexed caches |
| 08/28/1996 | EP0729100A1 Cache testing using a modified snoop cycle command |
| 08/28/1996 | EP0729094A1 A mixed-endian computing environment for a conventional bi-endian computer system |
| 08/28/1996 | EP0729093A1 A mixed-endian computer system |
| 08/28/1996 | EP0728338A1 Compound document framework |
| 08/28/1996 | EP0728336A1 Virtual indexing cache memory |
| 08/28/1996 | EP0728335A1 Mass data storage library |
| 08/28/1996 | EP0728333A1 Data backup and restore system for a computer network |
| 08/27/1996 | US5551053 System and Method for assigning addresses to I/O devices in a control network and for verifying the assigned address of the devices |
| 08/27/1996 | US5551051 Isolated multiprocessing system having tracking circuit for verifyng only that the processor is executing set of entry instructions upon initiation of the system controller program |
| 08/27/1996 | US5551048 Ring based distributed communication bus for a multiprocessor network |
| 08/27/1996 | US5551046 Method for non-hierarchical lock management in a multi-system shared data environment |
| 08/27/1996 | US5551027 Multi-tiered indexing method for partitioned data |
| 08/27/1996 | US5551010 Arithmetic operation unit and memory accessing device for accessing primary and secondary cache memories independently of a CPU |
| 08/27/1996 | US5551009 Expandable high performance FIFO design which includes memory cells having respective cell multiplexors |
| 08/27/1996 | US5551007 Method for controlling multiple common memories and multiple common memory system |
| 08/27/1996 | US5551006 Low cost writethrough cache coherency apparatus and method for computer systems without a cache supporting bus |
| 08/27/1996 | US5551005 Apparatus and method of handling race conditions in mesi-based multiprocessor system with private caches |
| 08/27/1996 | US5551004 Structure which renders faulty data of a cache memory uncacheable in order that a partially functional cache memory may be utilized |
| 08/27/1996 | US5551002 System for controlling a write cache and merging adjacent data blocks for write operations |
| 08/27/1996 | US5551001 Master-slave cache system for instruction and data cache memories |
| 08/27/1996 | US5551000 I/O cache with dual tag arrays |
| 08/27/1996 | US5550999 Information processing system which can check secondary storage medium having prescribed relation therewith and secondary storage device therefor |
| 08/27/1996 | US5550997 In an interactive network board, a method and apparatus for preventing inadvertent loading of a programmable read only memory |
| 08/27/1996 | US5550996 ROM burst transfer continuous read-out extension method and a microcomputer system with a built-in ROM using this method |
| 08/27/1996 | US5550995 Memory cache with automatic alliased entry invalidation and method of operation |
| 08/27/1996 | US5550987 Data transfer device |
| 08/27/1996 | US5550986 Data storage device matrix architecture |
| 08/27/1996 | US5550984 Security system for preventing unauthorized communications between networks by translating communications received in ip protocol to non-ip protocol to remove address and routing services information |
| 08/27/1996 | US5550980 Networked facilities management system with optical coupling of local network devices |