Patents
Sitemap › G06 - Computing; Calculating; Counting › G06F - Electric digital data processing › G06F 12 - Accessing, addressing or allocating within memory systems or architectures
Patents for G06F 12 - Accessing, addressing or allocating within memory systems or architectures (152,539)
11/1996
11/26/1996US5579504 Multi-processor computer system having shared memory, private cache memories, and invalidate queues having valid bits and flush bits for serializing transactions
11/26/1996US5579503 Direct cache coupled network interface for low latency
11/26/1996US5579501 Method for transforming a hash bucket number to a control interval to identify the physical location of information in a mass memory
11/26/1996US5579500 Control apparatus for controlling data read accesses to memory and subsequent address generation scheme based on data/memory width determination and address validation
11/26/1996US5579499 Product for representing data object in concatenated multiple virtual address spaces with combined requests for segment mapping
11/26/1996US5579493 System with loop buffer and repeat control circuit having stack for storing control information
11/26/1996US5579473 Interface controller for frame buffer random access memory devices
11/26/1996US5579452 Method of managing memory allocation in a printing system
11/26/1996US5579279 Semiconductor memory device and method of manufacturing the same
11/26/1996US5579275 Video memory system
11/26/1996US5579272 Semiconductor memory device with data compression test function and its testing method
11/26/1996US5579196 Protection circuit for devices comprising nonvolatile memories
11/26/1996US5578940 Modular bus with single or double parallel termination
11/21/1996WO1996037050A1 Reconfigurable interleaver/deinterleaver and address generator for data streams interleaved according to one of a plurality of interleaving schemes
11/21/1996WO1996036947A1 Transaction recovery in a value transfer system
11/21/1996WO1996036919A1 A microcomputer
11/21/1996DE19619497A1 Impulsmodusendeerkennungseinheit Pulse mode end detection unit
11/20/1996EP0743609A2 Method for querying incrementally maintained transactional databases
11/20/1996EP0743608A2 Dealing with side effects of transactions in data base systems
11/20/1996EP0743607A2 Method and apparatus for querying a database containing disjunctive information
11/20/1996EP0743603A1 Integrated circuit device for use in the protection of multiple resources in an electronic assembly
11/20/1996EP0743602A1 Integrated circuit device with function usage control
11/20/1996EP0743601A2 A system and method for improving cache performance in a multiprocessing system
11/20/1996EP0743597A1 Programming memory devices through the parallel port of a computer system
11/20/1996EP0743594A1 Matrix transposition
11/20/1996CN1136354A A fault tolerant queue system
11/20/1996CA2176165A1 Method for querying incrementally maintained transactional databases
11/20/1996CA2174462A1 Dealing with side effects of transactions in data base systems
11/19/1996US5577249 Method for finding a reference token sequence in an original token string within a database of token strings using appended non-contiguous substrings
11/19/1996US5577248 Method and apparatus for finding longest and closest matching string in history buffer prior to current string
11/19/1996US5577246 Database memory compaction and reclamation method
11/19/1996US5577243 Reallocation of returned memory blocks sorted in predetermined sizes and addressed by pointer addresses in a free memory list
11/19/1996US5577242 System for batch transfer file management using a list to organize a batch of blocks into buffers
11/19/1996US5577240 Identification of stable writes in weakly consistent replicated databases while providing access to all writes in such a database
11/19/1996US5577230 Apparatus and method for computer processing using an enhanced Harvard architecture utilizing dual memory buses and the arbitration for data/instruction fetch
11/19/1996US5577228 Digital circuit for performing multicycle addressing in a digital memory
11/19/1996US5577227 In a computing system
11/19/1996US5577226 Method and system for coherently caching I/O devices across a network
11/19/1996US5577225 Data cache memory internal circuitry for reducing wait states
11/19/1996US5577224 Method and system for caching data
11/19/1996US5577223 Dynamic random access memory (DRAM) with cache and tag
11/19/1996US5577222 System for asynchronously duplexing remote data by sending DASD data grouped as a unit periodically established by checkpoint based upon the latest time value
11/19/1996US5577221 Method and device for expanding ROM capacity
11/19/1996US5577219 Method and apparatus for preforming memory segment limit violation checks
11/19/1996US5577218 Memory access control method wherein block access is performed as a sequential access to an address updated by incrementation
11/19/1996US5577200 Method and apparatus for loading and storing misaligned data on an out-of-order execution computer system
11/19/1996US5577195 Semiconductor data storage device with means for protecting data upon external power supply connection and disconnection
11/19/1996US5577193 Multiple data registers and addressing technique therefore for block/flash writing main memory of a DRAM/VRAM
11/19/1996US5577125 Graphical manipulation of encryption
11/19/1996US5577055 Method and circuit device to control a memory
11/19/1996US5577005 Circuit for using chip information
11/19/1996US5576997 Data processing system and semiconductor memory suited for the same
11/19/1996US5576850 Image memory editing apparatus
11/19/1996US5576698 Physical addressing of modules
11/19/1996US5576554 Wafer-scale integrated circuit interconnect structure architecture
11/17/1996CA2174461A1 Method and apparatus for querying a database containing disjunctive information
11/14/1996WO1996035995A1 Method and apparatus for managing snoop requests using snoop advisory cells
11/14/1996WO1996035993A2 Method and apparatus for consolidated buffer handling for computer device input/output
11/14/1996WO1996035992A1 Semiconductor memory having arithmetic function, and processor using the same
11/14/1996DE19615956A1 DRAM connected non-volatile semiconductor memory device
11/14/1996DE19516667A1 Speicherverwaltungsverfahren Memory management method
11/14/1996CA2220547A1 Semiconductor memory having arithmetic function, and processor using the same
11/13/1996EP0742671A1 Apparatus for fault-tolerant multimedia program distribution
11/13/1996EP0742666A2 Information retrieval device and method
11/13/1996EP0742525A2 System and method for discovering similar time sequences in databases
11/13/1996EP0742519A2 Memory allocation maintaining ordering across multiple heaps
11/13/1996EP0742516A2 Device for putting into operation an integrated circuit
11/13/1996EP0741935A1 Apparatus and method for controlling access to and interconnection of computer system resources
11/13/1996EP0741902A1 Improved memory devices
11/13/1996EP0680651A4 Pipeline read write operations in a high speed frame buffer system.
11/12/1996US5574953 Storing compressed data in non-contiguous memory
11/12/1996US5574952 Data storage system and method for operating a disk controller including allocating disk space for compressed data
11/12/1996US5574948 Method for separating jumpless add-on cards having identical I/O port onto different I/O ports by using comparison technique based on the card numbers
11/12/1996US5574944 System for accessing distributed memory by breaking each accepted access request into series of instructions by using sets of parameters defined as logical channel context
11/12/1996US5574936 Access control mechanism controlling access to and logical purging of access register translation lookaside buffer (ALB) in a computer system
11/12/1996US5574923 Method and apparatus for performing bi-endian byte and short accesses in a single-endian microprocessor
11/12/1996US5574908 Method and apparatus for generating a query to an information system specified using natural language-like constructs
11/12/1996US5574907 Two-pass defragmentation of compressed hard disk data with a single data rewrite
11/12/1996US5574904 Database management system in an intelligent network using a common request data format
11/12/1996US5574903 In a computer
11/12/1996US5574897 Object recovery mechanism in a computer system
11/12/1996US5574883 Single chip processing unit providing immediate availability of frequently used microcode instruction words
11/12/1996US5574881 High capacity data storage method and system using independently controlled heads and circuitry for monitoring access frequency of data records
11/12/1996US5574880 Mechanism for performing wrap-around reads during split-wordline reads
11/12/1996US5574878 Method of parallel purging of translation lookaside buffer in a multilevel virtual machine system
11/12/1996US5574877 TLB with two physical pages per virtual tag
11/12/1996US5574875 Cache memory system including a RAM for storing data and CAM cell arrays for storing virtual and physical addresses
11/12/1996US5574856 Fault indication in a storage device array
11/12/1996US5574849 Synchronized data transmission between elements of a processing system
11/12/1996US5574786 Securing trusted personal computer system against unauthorized movement
11/12/1996US5574708 Data processing apparatus
11/12/1996US5574689 Address comparing for non-precharged redundancy address matching
11/12/1996US5574662 Disk-based digital video recorder
11/09/1996CA2173819A1 Memory allocation maintaining ordering across multiple heaps
11/07/1996WO1996035292A1 Store management process
11/07/1996WO1996035176A1 Bus bridge address translator
11/07/1996WO1996035169A1 Page migration in a non-uniform memory access (numa) system
11/07/1996WO1996035166A1 Enhanced-performance floppy diskette subsystem
11/06/1996EP0741392A1 Using one memory to supply addresses to an associated memory during testing
11/06/1996EP0741358A2 Microcomputer
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