Patents
Sitemap › H03 - Basic electronic circuitry › H03K - Pulse technique › H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
12/2003
12/16/2003US6664832 Arbitrary waveform synthesizer using a free-running ring oscillator
12/16/2003US6664816 Signal amplitude comparator
12/16/2003US6664812 Slew based clock multiplier
12/16/2003US6664556 Method and apparatus for a phototransistor pulse width converter
12/11/2003US20030227813 Semiconductor apparatus which prevents generating noise and being influenced by noise
12/11/2003US20030227335 Clock modulating circuit
12/11/2003US20030227310 Clock recovery circuit
12/11/2003US20030227309 Analog synchronous mirror delay circuit, method of generating a clock and internal clock generator using the same
12/11/2003US20030227305 Method and apparatus for enabling a timing synchronization circuit
12/11/2003US20030227304 Semiconductor integrated circuit device
12/11/2003US20030227300 Multiple asynchronous switching system
12/11/2003US20030227299 High speed differential receiver
12/10/2003EP1368896A1 Sigma delta fractional-n frequency divider with improved noise and spur performance
12/10/2003EP1078458B1 Timing device and method
12/09/2003US6662305 Fast re-synchronization of independent domain clocks after powerdown to enable fast system start-up
12/09/2003US6661859 Synchronizer for a source synchronized clock bus with multiple agents
12/09/2003US6661736 Apparatus and method for distributing a clock signal on a large scale integrated circuit
12/09/2003US6661364 Semiconductor device for inverter controlling
12/09/2003US6661359 Device and method for generating synchronous numeric signals
12/09/2003US6661298 Method and apparatus for a digital clock multiplication circuit
12/09/2003US6661273 Substrate pump circuit and method for I/O ESD protection
12/09/2003US6661272 Digitally controllable internal clock generating circuit of semiconductor memory device and method for same
12/09/2003US6661271 Multi-phase edge rate control for SCSI LVD
12/09/2003US6661269 Selectively combining signals to produce desired output signal
12/09/2003US6661265 Delay locked loop for generating complementary clock signals
12/09/2003US6661262 Frequency doubling two-phase clock generation circuit
12/09/2003US6661258 Low voltage detecting circuit for detecting input power of a modem
12/09/2003US6661121 Pulse generator with controlled output characteristics
12/04/2003WO2003100975A1 Clocked comparator circuit
12/04/2003WO2003100965A2 High speed amplifier incorporating pre-emphasis
12/04/2003WO2002054593A3 Digital frequency multiplier
12/04/2003US20030226082 Voltage-glitch detection device and method for securing integrated circuit device from voltage glitch attack
12/04/2003US20030226054 Clock generation circuit and clock generation method
12/04/2003US20030226053 Variably controlled delay line for read data capture timing window
12/04/2003US20030223488 Fast phase synchronization and retrieval of sequence components in three-phase networks
12/04/2003US20030222803 Duty cycle adapter
12/04/2003US20030222723 Fractional-frequency-modulation PLL synthesizer that suppresses spurious signals
12/04/2003US20030222705 Output circuit device for clock signal distribution in high-speed signal transmission
12/04/2003US20030222698 Process variation compensated high voltage decoupling capacitor biasing circuit with no DC current
12/04/2003US20030222696 DC offset cancellation circuit, differential amplification circuit with DC offset cancellation circuit, photo-electric pulse conversion circuit, pulse shaping circuit, and pulse generation circuit
12/04/2003US20030222693 Variable delay generator
12/04/2003US20030222692 Correction circuit, delay circuit, and ring oscillator circuit
12/04/2003US20030222689 Multi-phase edge rate control for scsi lvd
12/04/2003US20030222687 Chopper type comparator
12/04/2003US20030222685 Microcontroller unit
12/04/2003US20030222682 Cascode stage input/output device
12/04/2003US20030222681 Comparator
12/03/2003CN2590238Y Live-wire plug-in control circuit for plugable module
12/03/2003CN1130019C Synchronous delay circuit
12/02/2003US6658581 Timing adjustment of clock signals in a digital circuit
12/02/2003US6658544 Techniques to asynchronously operate a synchronous memory
12/02/2003US6658068 Detection of EFM stream component widths
12/02/2003US6657919 Delayed locked loop implementation in a synchronous dynamic random access memory
12/02/2003US6657918 Delayed locked loop implementation in a synchronous dynamic random access memory
12/02/2003US6657572 Digital noise-shaping filter with real coefficients and method for making the same
12/02/2003US6657503 High noise rejection voltage-controlled ring oscillator architecture
12/02/2003US6657477 Integrated circuit
12/02/2003US6657475 DC voltage bus clamp
12/02/2003US6657474 Circuits for a low swing clocking scheme
12/02/2003US6657473 Delay circuit having delay time adjustable by current
12/02/2003US6657469 Multi-slew-rate switching circuit
12/02/2003US6657467 Delay control circuit with internal power supply voltage control
12/02/2003US6656751 Self test method and device for dynamic voltage screen functionality improvement
11/2003
11/27/2003WO2002097958A3 Circuit configuration comprising a control loop
11/27/2003US20030219088 Digital DLL apparatus for correcting duty cycle and method thereof
11/27/2003US20030218486 Digital DLL apparatus for correcting duty cycle and method thereof
11/26/2003CN1129054C Long-delay clock pulse width regulating circuit
11/25/2003US6654916 Waveform generator, semiconductor testing device and semiconductor device
11/25/2003US6654900 Method and apparatus for producing multiple clock signals having controlled duty cycles by controlling clock multiplier delay elements
11/25/2003US6653881 Clock generator with programmable non-overlapping-clock-edge capability
11/25/2003US6653879 Method and system for managing a pulse width of a signal pulse
11/25/2003US6653877 Semiconductor device capable of internally adjusting delayed amount of a clock signal
11/25/2003US6653876 Method and apparatus for synthesizing a clock signal using a compact and low power delay locked loop (DLL)
11/25/2003US6653873 Large loading driver circuit with high speed and low crowbar current
11/25/2003US6653871 Method of and circuit for controlling a clock
11/25/2003US6653870 Signal detection circuit, data transfer control device and electronic equipment
11/20/2003WO2003085831A3 A method and apparatus for precise signal interpolation
11/20/2003US20030215039 Digital multi-phase clock generator
11/20/2003US20030214843 Clamping Circuit and nonvolatile memory device using the same
11/20/2003US20030214342 IO clamping circuit method utilizing output driver transistors
11/20/2003US20030214339 Timing generation circuit and method for timing generation
11/20/2003US20030214338 Tunable delay circuit
11/20/2003US20030214335 Clock and data recovery circuit and clock control method thereof
11/19/2003EP1363399A2 Clock and data recovery circuit and clock control method thereof
11/19/2003CN1128520C Clock reproduction circuit and elements used in the same
11/18/2003US6651179 Delay time judging apparatus
11/18/2003US6650575 Programmable delay circuit within a content addressable memory
11/18/2003US6650190 Ring oscillator with adjustable delay
11/18/2003US6650165 Localized electrostatic discharge protection for integrated circuit input/output pads
11/18/2003US6650163 Clock generator for integrated circuit
11/18/2003US6650160 Two step variable length delay circuit
11/18/2003US6650159 Method and apparatus for precise signal interpolation
11/18/2003US6650149 Latched active fail-safe circuit for protecting a differential receiver
11/18/2003US6650144 Line driver for supplying symmetrical output signals to a two-wire communication bus
11/13/2003WO2002051001A3 A bias circuit for a low voltage differential circuit
11/13/2003US20030210916 High speed burst-mode opto-electronic receiver
11/13/2003US20030210755 Data and clock synchronization in multi-channel communications
11/13/2003US20030210604 Synchronous semiconductor device having constant data output time regardless of bit organization, and method of adjusting data output time
11/13/2003US20030210602 Delay locked loop for use in synchronous dynamic random access memory
11/13/2003DE10216615C1 Verfahren und Vorrichtung zur Erzeugung einer Referenzspannung Method and apparatus for generating a reference voltage
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