Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
05/2003
05/30/2003WO2003044945A2 Multiphase comparator
05/29/2003US20030099319 Expanded comparator for control of digital delay lines in a delay locked loop or phase locked loop
05/29/2003US20030099307 Differential slicer circuit for data communication
05/29/2003US20030099299 Method and apparatus for data transfer using a time division multiple frequency scheme
05/29/2003US20030098749 Oscillator and electronic device using the same
05/29/2003US20030098747 Ring topology based voltage controlled oscillator
05/29/2003US20030098724 Receiving circuit
05/28/2003EP1314251A1 Digital clock multiplier and divider with synchronization
05/28/2003DE10156817C1 Mehrphasiger Komparator Multi-phase comparator
05/28/2003CN1110139C Wave-shape shaping circuit and infrared data communication device using same
05/28/2003CN1110138C High-speed pulse signal shaping technique using lossy non-uniform microstrip line
05/28/2003CN1110134C Digital noise-eliminating filter for lengthy noise, method and system therefor
05/28/2003CN1110095C Semiconductor device and internal function identification method of semiconductor device
05/27/2003US6570934 Single-end-zero receiver circuit
05/27/2003US6570426 Delay circuit
05/27/2003US6570425 Phase difference signal generator and multi-phase clock signal generator having phase interpolator
05/27/2003US6570419 Semiconductor integrated circuit having a clock recovery circuit
05/27/2003US6570410 Feed-forward approach for timing skew in interleaved and double-sampled circuits
05/27/2003US6570148 Signal input cutoff detector, photo receiver and signal input cutoff detecting method
05/22/2003WO2003043281A1 Soft-output slicer with differential difference amplifiers for binary signals
05/22/2003WO2003043190A1 Analog delay circuit
05/22/2003WO2002051008A3 Voltage-controlled oscillator with ac coupling to produce highly accurate duty cycle square wave output
05/22/2003WO2001099278A3 Symmetric clock receiver for differential input signals
05/22/2003US20030095009 Delay-locked loop circuit and method using a ring oscillator and counter-based delay
05/22/2003US20030094987 Method and apparatus for dynamically controlling the performance of buffers under different performance conditions
05/22/2003US20030094986 Multiphase comparator
05/22/2003US20030094984 Delay locked loop
05/22/2003US20030094981 Chopper type comparator
05/22/2003US20030094977 Voltage mode differential driver and method
05/22/2003US20030094975 Signal-off detection circuit and optical receiving device using the same
05/21/2003EP1313145A1 Amplifier circuit apparatus and method of EMI suppression
05/21/2003EP1312166A2 Voltage stabilized low level driver
05/21/2003EP1311935A2 Noise-shaped digital frequency synthesis
05/20/2003US6567490 Pulse signal delay circuit
05/20/2003US6567309 Semiconductor device
05/20/2003US6566939 Programmable glitch filter
05/20/2003US6566926 Hysteretic self-biased amplifier
05/20/2003US6566925 Duty-cycle regulator
05/20/2003US6566916 Chopper type comparator
05/20/2003US6566915 Differential envelope detector
05/20/2003US6566913 Method and apparatus for single-ended sense amplifier and biasing
05/20/2003US6566908 Pulse width distortion correction logic level converter
05/20/2003US6566907 Unclocked digital sequencer circuit with flexibly ordered output signal edges
05/20/2003US6566903 Method and apparatus for dynamically controlling the performance of buffers under different performance conditions
05/15/2003WO2003041275A1 Unlocked digital sequencer circuit with flexibly ordered output signal edges
05/15/2003WO2003041010A2 Method and system for performing fast fourier transforms and inverse fast fourier transforms
05/15/2003WO2003040915A1 Method for implementing of wait-states
05/15/2003WO2003040900A2 Clocking and synchronization circuitry
05/15/2003US20030092419 Method and apparatus for a near-unity divider in a direct conversion communication device
05/15/2003US20030091139 System and method for adjusting phase offsets
05/15/2003US20030091135 Digital filter for reducing voltage peaks
05/15/2003US20030091122 Data transfer using frequency notching of radio-frequency signals
05/15/2003US20030090954 One-shot signal generating circuit
05/15/2003US20030090952 Delayed locked loop implementation in a synchronous dynamic random access memory
05/15/2003US20030090327 High-speed and high-precision phase locked loop
05/15/2003US20030090309 Voltage clamp circuit
05/15/2003US20030090308 Circuit generating constant narrow-pulse-width bipolarity cycle monocycles using CMOS circuits
05/15/2003US20030090302 Semiconductor integrated circuit characterized by timing adjustment of clock switching control
05/15/2003US20030090300 Differential comparator with offset correction
05/15/2003US20030090299 Comparator having reduced sensitivity to offset voltage and timing errors
05/15/2003US20030090296 Apparatus for ensuring correct start-up and phase locking of delay locked loop
05/15/2003US20030090295 Self test method and device for dynamic voltage screen functionality improvement
05/15/2003US20030090290 Hi gain clock circuit
05/15/2003US20030090287 Input buffer with automatic switching point adjustment circuitry, and synchronous DRAM device including same
05/14/2003EP1311089A2 Data bus fault detection circuit and method
05/14/2003EP1311066A2 Apparatus and method for delay matching of full and divided clock signals
05/14/2003EP1311061A1 Polyphase signal generator
05/14/2003EP1090455A4 Crystal oscillator with controlled duty cycle
05/14/2003EP1010249B1 Direct sensor interface (dsi) module
05/14/2003CN1417946A Electric signal scrambling device
05/13/2003US6564359 Clock control circuit and method
05/13/2003US6564160 Random sampling with phase measurement
05/13/2003US6563363 Switched capacitor comparator network
05/13/2003US6563360 System for controlling electrical signal level
05/13/2003US6563359 Semiconductor integrated circuit including clock modulation circuit
05/13/2003US6563355 Recovery circuit generating low jitter reproduction clock
05/13/2003US6563347 Redundant comparator design for improved offset voltage and single event effects hardness
05/12/2003CA2409589A1 Data bus fault detection circuit and method
05/08/2003WO2003025853A3 Method and apparatus for implementing precision time delays
05/08/2003US20030088801 Implementation of wait-states
05/08/2003US20030086500 Digital noise-shaping filter with real coefficients and method for making the same
05/08/2003US20030085766 Tunable oscillator
05/08/2003US20030085748 Clock generator to control a pules width according to input voltage level in semiconductor memory device
05/08/2003US20030085747 Integrable, controllable delay device, delay device in a control loop, and method for delaying a clock signal using a delay device
05/08/2003US20030085746 Polyphase signal generator
05/08/2003US20030085744 Delay locked loop circuit and method having adjustable locking resolution
05/08/2003US20030085742 Clocking and synchronization circuitry
05/08/2003US20030085740 Rail-to-rail cmos comparator
05/08/2003US20030085734 Unclocked digital sequencer circuit with flexibly ordered output signal edges
05/08/2003DE10205705C1 Integratable circuit for floating signal transfer has selection circuit connected to secondary winding that separates secondary pulses in accordance with association with input signal edges
05/08/2003DE10147081C1 Vorrichtung zum Signalisieren des Ablaufs eines vorgegebenen Zeitwerts A device for signaling the execution of a predetermined time value
05/07/2003EP1309086A1 Digital clock detection
05/07/2003CN1416575A One-shot signal generating circuit
05/07/2003CN1416221A Chopper modulus converter
05/07/2003CN1416220A Comparator circuit, comparator, level sensing circuit and threshold voltage setting method
05/07/2003CN1416215A Oscillator and electronic instrument using same
05/07/2003CN1107955C Voltage boosting circuit of semiconductor memory device
05/06/2003US6559787 Apparatus for reducing charge kickback in a dynamic comparator
05/06/2003US6559719 Amplifier
05/06/2003US6559699 Dual control analog delay element