Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
01/2004
01/15/2004US20040008064 Clock generating circuit capable of generating internal clock accurately synchronized with external clock
01/15/2004US20040008063 Delay locked loop clock generator
01/15/2004US20040008060 Clock multiplication circuit
01/15/2004US20040008058 Impedance comparison integrator circuit
01/15/2004DE10318184A1 Analog/Digital-Umwandlungsverfahren und -vorrichtung Analog / digital converting method and apparatus
01/15/2004DE10227618A1 Logikschaltung Logic circuit
01/14/2004CN1467844A 半导体集成电路器件 The semiconductor integrated circuit device
01/14/2004CN1134759C Buzzer driving circuit
01/13/2004US6678193 Apparatus and method for tracking between data and echo clock
01/13/2004US6677880 Power consumption is reduced
01/13/2004US6677877 Comparator, analog-to-digital converter and method of analog-to-digital conversion using non-linear magneto-electronic device
01/13/2004US6677825 Ring oscillator circuit and a delay circuit
01/13/2004US6677796 Method and apparatus for implementing precision time delays
01/13/2004US6677792 Digital DLL apparatus for correcting duty cycle and method thereof
01/13/2004US6677791 Clock generation circuit, control method of clock generation circuit, clock reproducing circuit, semiconductor memory device, and dynamic random access memory
01/13/2004US6677785 Power level detection circuit
01/08/2004WO2004004137A2 Apparatus, and associated method, for performing joint equalization in a multiple-input, multiple-output communication system
01/08/2004WO2004003763A1 High speed differential pre-driver using common mode pre-charge
01/08/2004WO2004003574A1 Under-voltage detection circuit
01/08/2004US20040004902 Semiconductor integrated circuit device
01/08/2004US20040004505 Data delay circuit
01/07/2004EP1378996A2 Correction circuit, delay circuit, and ring oscillator circuit
01/07/2004EP1378814A2 Output circuit device for clock signal distribution
01/07/2004EP1378055A1 Power oscillator for control of waveshape and amplitude
01/07/2004CN1466147A Control time pulse generator and control time pulse generation method for high-speed sensing amplifier
01/06/2004US6675311 Data processing system generating clock signal from an input clock, phase locked to the input clock and used for clocking logic devices
01/06/2004US6675117 Calibrating single ended channels for differential performance
01/06/2004US6674772 Data communications circuit with multi-stage multiplexing
01/06/2004US6674314 Interpolating circuit, DLL circuit and semiconductor integrated circuit
01/06/2004US6674312 Differential signal reception device and method for supporting variable threshold levels
01/06/2004US6674311 Electronic device having a CMOS circuit
01/02/2004EP1376869A1 Variable phase-shift circuit, phase interpolator including the same, and a digital frequency synthesizer incorporating such an interpolator
01/02/2004EP1374242A1 Storing an unchanging binary code in an integrated circuit
01/02/2004EP1374033A2 Improved high speed data capture circuit for a digital device
01/01/2004US20040001551 Data transmission circuit and method for reducing leakage current
01/01/2004US20040001537 Apparatus, and associated method, for performing joint equalization in a multiple-input, multiple-output communication system
01/01/2004US20040000940 Circuit and method for outputting aligned strobe signal and parallel data signal
01/01/2004US20040000939 Clock generation circuit and clock conversion circuit
01/01/2004US20040000935 Digital clock rate multiplier method and apparatus
01/01/2004US20040000933 Output driver circuit
01/01/2004US20040000924 Method and apparatus for selectably providing single-ended and differential signaling with controllable impedance and transition time
01/01/2004US20040000680 High speed differential pre-driver using common mode pre-charge
12/2003
12/31/2003WO2004001972A1 Synchronous mirror delay (smd) circuit and method including a counter and reduced size bi-directional delay line
12/31/2003WO2004001971A1 Logic circuit
12/30/2003US6671652 Clock skew measurement circuit on a microprocessor die
12/30/2003US6670859 Differential ring oscillator stage
12/30/2003US6670840 Input clamp circuit for 5V tolerant and back-drive protection of I/O receivers using CMOS process
12/30/2003US6670839 Clock monitoring apparatus
12/30/2003US6670838 Digital clock adaptive duty cycle circuit
12/30/2003US6670837 Time domain reflectometer with digitally generated variable width pulse output
12/30/2003US6670835 Delay locked loop for controlling phase increase or decrease and phase control method thereof
12/30/2003US6670832 Glitch detect filter
12/30/2003US6670831 Signal processing circuit and method for measuring pulse width under existence of chattering noise
12/30/2003CA2130822C Video signal data and composite synchronization extraction circuit for on-screen display
12/25/2003US20030235260 Methods and apparatus for generating timing signals
12/25/2003US20030234674 System, circuit and method for low voltage operable, small footprint delay
12/25/2003US20030234673 Synchronous mirror delay (smd) circuit and method including a counter and reduced size bi-directional delay line
12/25/2003US20030234672 Clock signal generation circuit and audio data processing apparatus
12/25/2003US20030234671 Pulse generation circuit enabling its output pulse cycle to be shortened
12/25/2003US20030234670 Frequency doubling two-phase clock generation circuit
12/25/2003US20030234669 Methods and apparatus for synthesizing a clock signal
12/24/2003WO2003107349A2 Methods and apparatus for delay circuit
12/24/2003CN1463491A 半导体集成电路 The semiconductor integrated circuit
12/24/2003CN1463076A Correction circuit, delay circuit and annular oscillator circuit
12/24/2003CN1132311C Semiconductor delay circuit
12/23/2003US6668357 Cold clock power reduction
12/23/2003US6668342 Apparatus for a radiation hardened clock splitter
12/23/2003US6668334 Apparatus for detecting clock failure within a fixed number of cycles of the clock
12/23/2003US6668031 Synchronized data capturing circuits using reduced voltage levels and methods therefor
12/23/2003US6667707 Analog-to-digital converter with the ability to asynchronously sample signals without bias or reference voltage power consumption
12/23/2003US6667645 Pulsed clock signal transfer circuits with dynamic latching
12/23/2003US6667643 Delay locked loop with multi-phases
12/23/2003US6667641 Programmable phase shift circuitry
12/23/2003US6667639 Frequency multiplying system having a plurality of output frequencies
12/18/2003WO2003061122A3 Differential amplifier circuit for regenerating complementary digital signals
12/18/2003WO2003041010A3 Method and system for performing fast fourier transforms and inverse fast fourier transforms
12/18/2003WO2003026128A3 Hysteresis comparator
12/18/2003WO2002082648A3 Event detection with a digital processor
12/18/2003WO2002046937A8 Configurable operational amplifier as a microcontroller peripheral
12/18/2003US20030231713 Complement reset buffer
12/18/2003US20030231064 PLL circuit and phase difference detecting circuit that can reduce phase pull-in time and adjust a skew at a higher precision
12/18/2003US20030231043 Integrated circuit device with clock skew reduced
12/18/2003US20030231042 Methods and apparatus for delay circuit
12/18/2003US20030231041 Dual control analog delay element and related delay method
12/18/2003US20030231040 Complement reset multiplexer latch
12/18/2003US20030231038 Pulse shaping circuit and method
12/18/2003US20030231032 Multistage level discrimination circuit
12/17/2003EP1372267A1 Frequency synthesizer having a microcontroller
12/17/2003EP1097513B1 Clock pulse degradation detector
12/17/2003CN1462509A Increment summation fractional-N frequency divider with improved noise and spur performance
12/16/2003US6665808 System for generating timing signal varying over time from an ideal signal by combining nominal parameter value signal and parameter variation value signal
12/16/2003US6665354 Differential input receiver and method for reducing noise
12/16/2003US6665230 Programmable delay compensation circuit
12/16/2003US6665218 Self calibrating register for source synchronous clocking systems
12/16/2003US6664840 Offset calibration system and method for a high gain signal channel
12/16/2003US6664838 Apparatus and method for generating a compensated percent-of-clock period delay signal
12/16/2003US6664837 Delay line trim unit having consistent performance under varying process and temperature conditions
12/16/2003US6664836 Dynamic phase splitter circuit and method for low-noise and simultaneous production of true and complement dynamic logic signals
12/16/2003US6664835 Phase splitter
12/16/2003US6664834 Method for automatic duty cycle control using adaptive body bias control