Patents
Patents for H03K 5 - Manipulating pulses not covered by one of the other main groups in this subclass (25,714)
04/2004
04/08/2004US20040067764 Wireless communications devices, methods of processing a wireless communication signal, wireless communication synchronization methods and a radio frequency identification device communication method
04/08/2004US20040066873 Delay locked loop circuit for internally correcting duty cycle and duty cycle correction method thereof
04/08/2004US20040066864 Method and system for data and edge detection with correlation tables
04/08/2004US20040066859 Passive redundant digital data receiver with schmitt-trigger
04/08/2004US20040066858 Constant delay zero standby differential logic receiver and method
04/08/2004US20040066242 High noise rejection voltage-controlled ring oscillator architecture
04/08/2004US20040066238 Phase-lock loop having programmable bandwidth
04/08/2004US20040066223 Balanced programmable delay element
04/08/2004US20040066222 Non-iterative introduction of phase delay into signal without feedback
04/08/2004US20040066221 Non-iterative signal synchronization
04/08/2004US20040066216 Differential output structure with reduced skew for a single input
04/08/2004DE10243564A1 Schaltungsanordnung zur Mittelwertbildung A circuit arrangement for averaging
04/08/2004DE10196304B4 Variable Verzögerungsschaltung Variable delay circuit
04/08/2004DE10161054B4 Takt- und Daten-Wiederherstellschaltung und Taktsteuerverfahren Clock and data recovery circuit and clock control method
04/08/2004DE10048538B4 Schnellschaltender Komparator mit Hysterese Quick switching-type comparator with hysteresis
04/07/2004EP1406409A2 Non-iterative signal synchronization
04/07/2004CN1488193A Amplitude converting circuit
04/07/2004CN1487669A Time-delay locking loop circuit for internally correcting dutyratio and method for correcting duty cycle thereof
04/07/2004CN1487666A Comparer circuit
04/06/2004US6717997 Apparatus and method for current demand distribution in electronic systems
04/06/2004US6717479 Delay circuit and ring oscillator
04/06/2004US6717466 Comparator
04/06/2004US6717451 Precision analog level shifter with programmable options
04/06/2004US6717447 Delay adjustment circuit
04/01/2004US20040064749 Fully digitally controlled delay element with wide delay tuning range and small tuning error
04/01/2004US20040064279 Hysteresis characteristic setting device and hysteresis characteristic setting method
04/01/2004US20040063415 Integrated tunable filter for broadband tuner
04/01/2004US20040062121 Semiconductor memory device having duty cycle correction circuit and interpolation circuit interpolating clock signal in the semiconductor memory device
04/01/2004US20040061637 Sample-and-hold amplifier circuit and pipelined A/D and D/A converters using sample hold amplification circuit
04/01/2004US20040061560 Frequency multiplier and method of multiplying frequency of external clock signal, data output buffer, and semiconductor device including the frequency multiplier and the data output
04/01/2004US20040061550 Semiconductor device using current mirror circuit
04/01/2004US20040061545 Timing generator with low delay multiplexer
04/01/2004US20040061539 Linear half-rate phase detector for clock recovery and method therefor
04/01/2004US20040061530 Clock conversion apparatus, clock conversion method, video display apparatus, and memory address setting method
04/01/2004US20040061529 Status scheme signal processing circuit
04/01/2004US20040061522 Digital level shifter with reduced power dissipation and false transmission blocking
04/01/2004DE10244186A1 Receiver circuit for push-pull transmission procedure, includes detector circuit with first and second detectors for comparing amplitude of each input signal against detection threshold
04/01/2004DE10241982A1 Digital signal delay device, uses single inverters connected in series to provide desired delay, e.g. using switching devices
04/01/2004CA2688916A1 Method for reduction of aliasing introduced by spectral envelope adjustment in real-valued filterbanks
03/2004
03/31/2004EP1404050A2 Input/output circuit for simultaneously bidirectional transmission
03/31/2004EP1404018A1 Hysteresis characteristic setting device and hysteresis characteristic setting method
03/31/2004EP1402641A2 Method and apparatus for a clock circuit
03/31/2004EP1402637A1 Controllable delay circuit for delaying an electric signal
03/31/2004EP1010245A4 System for compensating for temperature induced delay variation in an integrated circuit
03/31/2004CN1486432A Calibrating single ended channels for differential performance
03/31/2004CN1485656A Pellicle
03/31/2004CN1144367C Synchronous delay circuit
03/31/2004CN1144117C Method and circuit for controlling clock signal
03/30/2004US6715118 Configuration for generating signal impulses of defined lengths in a module with a bist-function
03/30/2004US6714462 Method and circuit for generating constant slew rate output signal
03/30/2004US6714063 Current pulse receiving circuit
03/30/2004US6714061 Semiconductor controlled rectifier / semiconductor controlled switch based ESD power supply clamp with active bias timer circuitry
03/30/2004US6714049 Logic state transition sensor circuit
03/30/2004US6713815 Semiconductor device with transistors that convert a voltage difference into a drain current difference
03/30/2004CA2239889C Decoder for a trellis encoded signal corrupted by ntsc co-channel interference and white noise
03/25/2004WO2004025838A1 Coding of information in integrated circuits
03/25/2004WO2003067269A3 Peak-to-peak signal detector
03/25/2004US20040059955 Timing adjustment of clock signals in a digital circuit
03/25/2004US20040059533 Method and apparatus for calibration of a delay element
03/25/2004US20040059524 Clock skew measurement circuit on a microprocessor die
03/25/2004US20040057546 Variable phase-shifting circuit, phase interpolator incorporating it, and digital frequency synthesizer incorporating such an interpolator
03/25/2004US20040056699 Clock generator with programmable non-overlapping-clock-edge capability
03/25/2004US20040056698 Time delay apparatus and method of using same
03/25/2004US20040056697 DQS postamble noise suppression by forcing a minimum pulse length
03/25/2004US20040056692 Selectively combining signals to produce desired output signal
03/25/2004US20040056691 Comparator with hysteresis
03/25/2004US20040056690 Transformation of a periodic signal into an adjustable-frequency signal
03/25/2004US20040056689 Method and structure for integrated circuit interference isolation enhancement
03/25/2004US20040056202 Time-to-voltage converter
03/25/2004US20040056181 DC offset cancellation circuit, differential amplification circuit with DC offset cancellation circuit, photo-electric pulse conversion circuit, pulse shaping circuit, and pulse generation circuit
03/25/2004DE10201995B4 Verfahren zur Zuordnung eines Pulslaufes zu einem von einer Mehrzahl von Pulstypen verschiedener Abklingzeit und Vorrichtung zu dessen Durchführung A method for assigning a pulse to a barrel of a plurality of types of different pulse decay time and device for its implementation
03/24/2004CN1484438A Clock converter, clock converting method, video dioplay device and method for setting memory address
03/24/2004CN1143435C Improved delay lockloop
03/23/2004US6711724 Semiconductor integrated circuit device having pipeline stage and designing method therefor
03/23/2004US6711360 Duty-cycle adjustable clock generator with low reverse bias and zero DC level
03/23/2004US6710733 Comparator circuit
03/23/2004US6710725 Acoustic noise suppressing circuit by selective enablement of an interpolator
03/23/2004US6710637 Non-overlap clock circuit
03/23/2004US6710629 Impedance comparison integrator circuit
03/23/2004US6710622 Programmable digital one-shot
03/18/2004US20040054977 Delay model circuit for use in delay locked loop
03/18/2004US20040052323 Phase interpolater and applications thereof
03/18/2004US20040052316 Apparatus and method for recovering clock signal from burst mode signal
03/18/2004US20040051594 Power oscillator for control of waveshape and amplitude
03/18/2004US20040051577 Semiconductor integrated circuit including waveform-generating circuit having pulsed waveform-generating function
03/18/2004US20040051573 Circuit configuration for regenerating clock signals
03/18/2004US20040051569 Register controlled delay locked loop
03/18/2004US20040051567 Skew-free dual rail bus driver
03/18/2004US20040051557 Input buffer of differential amplification type in semiconductor device
03/18/2004DE19860964B4 Digital clock generator for microprocessors
03/18/2004DE10239834A1 Integrated circuit has coupled memory and data transistors and a connection unit providing a clock signal for these transistors
03/17/2004EP1398900A1 Convertion of a periodic signal into a signal with adjustable frequency
03/17/2004EP1398836A2 Thin film semiconductor device and manufacturing method
03/17/2004EP1397857A2 Circuit configuration comprising a control loop
03/17/2004EP1397806A1 Identification of an integrated circuit from its physical manufacture parameters
03/17/2004EP1397804A1 High-speed zero phase restart of a multiphase clock
03/17/2004EP1159719A4 Jitter buffer and methods for control of same
03/17/2004CN1482730A Integrated circuit driver with stable bootstrap power supply
03/17/2004CN1142628C Shaping circuit
03/16/2004US6708261 Multi-stage data buffers having efficient data transfer characteristics and methods of operating same